181,858 research outputs found

    Workplace intervention to improve work functioning for patients with rheumatoid arthritis

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    Anema, J.R. [Promotor]Boot, C.R.L. [Copromotor]Steenbeek, R. [Copromotor]Schaardenburg, D. van [Copromotor

    Design and implementation of fpga-base boot loader

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    碩士本論文主要提出一個USB開機載入器(Boot Loader)與一個FPGA架構為基礎之雙Nios II處理器系統開機載入器的設計與實現。首先本文所用的FPGA實驗板為友晶公司的出的DE2-70開發板為實驗平台。此平台上具有一顆USB控制晶片,本文以U-Boot程式為基礎去撰寫程式並驅動FPGA實驗板上的USB裝置,最後順利從USB隨身碟內讀取事先做好的uCLinux核心映像檔程式,並成功在FPGA實驗板上將uCLinux作業系統開啟。透過此方法可節省每次燒錄FLASH記憶體的時間且增加FPGA實驗板上的FLASH記憶體使用壽命、且方便更新作業系統程式,達到多人共享開發平台等優點。另外本文在FPGA晶片內設計雙Nios II處理器系統設計架構,由實驗結果得知本文成功讓兩顆Nios II處理器分別開機載入執行各自程式,未來當機器人系統需要多處理器來控制時,便可用此方法來啟動多核心處理器系統。This paper proposed a boot loader design method based on U-Boot architecture to drive a USB FLASH disk and read an uClinux kernel to boot system. A DE2-70 FPGA board is used as an experimental platform. This platform has a USB controller chip. This paper discusses a way to write an application to drive the USB controller chip on the FPGA development board based on the U-Boot program. Then the application retrieves the uCLinux kernel image from the USB flash drive and boots up the uCLinux on the FPGA development board. Next, a uCLinux kernel image is read from the USB flash disk and completes the boot loader action. Via this way, some advantages can be obtained for saving the programming time of FLASH memory, increasing the life cycle of FLASH memory, updating operation system convenient and sharing development platform. Additionally, the paper designed a dual Nios II processor architecture in the FPGA chip. From the experimenal results, we know that this paper can make each Nios II processor run different program as it is booted. In the future, it can be utilized to boot multi-core systems for requests of multi-processors in the systems.目 錄 目 錄 I 圖目錄 III 表目錄 V 第一章 緒論 1 1.1 研究背景 1 1.2 研究目的 4 1.3 論文架構 5 第二章 U-Boot介紹 6 2.1 U-Boot介紹 7 2.2 Nios U-Boot根目錄檔案介紹 8 2.3 Nios U-Boot啟動介紹 10 2.4 新增U-Boot新增系統命令 15 第三章 USB介紹 18 3.1 USB設計原理 19 3.2 USB資料傳輸格式介紹 20 3.3 封包格式介紹 21 3.4 USB傳輸協定介紹巨量傳輸 25 第四章 USB硬體設備介紹 32 4.1 DE2-70主版介紹 32 4.2 USB ST-Ericsson ISP1362簡介 35 4.3 ISP1362 Chip驅動說明 38 4.4 撰寫U-Boot內ISP1362晶片驅動流程 53 第五章 U-Boot於雙NiosII處理器應用 60 5.1 將DE2-70上FPGA切割為兩個CPU 60 5.2 讀取雙核心開機資訊 61 5.3 製作U-Boot雙核心開機程式 62 第六章 實驗結果 64 6.1 USB開機載入器執行結果 64 6.2 NIOS雙核心開機載入器執行結果 66 第七章 結論 70 附錄A ISP1362 Datasheet暫存器說明 71 參考文獻 98 圖目錄 圖2. 1  硬體元件初始流程圖 11 圖2. 2  平台初始化流程圖 14 圖2. 3  SDRAM空間分配 15 圖3. 1  USB Server/Client示意圖 18 圖3. 2  USB Server流程圖 20 圖4. 1 DE2-70功能區塊圖 34 圖4. 2 ISP1362內部區塊圖 36 圖4. 3 變更為各控制模組後的腳位變化 39 圖4. 4 記憶體緩衝區說明 39 圖4. 5 各緩衝區區域說明 40 圖4. 6 PTD資料欄位說明 41 圖4. 7 每一端點資料長度說明 42 圖4. 8 存取記憶體緩衝器區塊圖 42 圖4. 9 DMA存取記憶體緩衝器區塊圖 43 圖4. 10 PIO存取內部控制暫存器 43 圖4. 11 IC內部連接介面變化示意圖 44 圖4. 12 IC內部控制暫存器變化示意圖 44 圖4. 13 控制PIO暫存器時IC腳位波形 45 圖4. 14 HC控制流程 47 圖4. 15 U-Boot研讀 54 圖4. 16 USB規格研讀 54 圖4. 17 U-Boot中ISP1362驅動程式撰寫 55 圖5. 1 bootCPU不同應用程式運作核心核心線路區塊圖 61 圖5. 2 uCLinux作業系統核心線路區塊圖 61 圖5. 3 DE2-70雙核心載入器資訊讀取 62 圖5. 4 架構示意圖以及記憶體映射位址 63 圖6. 1 USB啟動程式指令 65 圖6. 2 載入系統核心映像檔 65 圖6. 3 系統開機畫面 66 圖6. 4 將FPGA的硬體SOF檔載入 67 圖6. 5 ucCPU啟動結果 68 圖6. 6 啟動 bootCPU 開機 69 表目錄 表1. 1 BootLoader比較表 3 表2. 1 U_BOOT_CMD參數說明表 16 表3. 1 Token Packets封裝格式 22 表3. 2 PID內容格式 22 表3. 3 Handshake PID說明表 23 表3. 4 ADDR內容格式 24 表3. 5 ENDP內容格式 24 表3. 6 Data Packets內容格式 25 表3. 7 Data Packets不同傳輸速度最大傳送位元 25 表3. 8 傳輸速度對巨量傳輸的限定對照表 26 表3. 9 傳輸速度對等時傳輸的限定對照表 26 表3. 10 Data Packets類別及所佔資料長度 27 表3. 11 bmRequestTye資料內容說明 27 表3. 12 bRequest資料內容說明 27 表3. 13 USB Get Status 28 表3. 14 USB Set Feature 28 表3. 15 USB Clear Feature 28 表3. 16 USB Set Address 29 表3. 17 USB Get Descripter 29 表3. 18 USB Set Descriptor 29 表3. 19 USB Get Configuration 29 表3. 20 USB Set Configuration 30 表3. 21 USB Get Interface 30 表3. 22 USB Set Interface 30 表3. 23 USB Sync Frame 30 表3. 24 中斷傳輸各模式對照表 31 表4. 1 DE2-70周邊硬體映射RAM記憶體位址 35 表4. 2 DMA channel 46 表4. 3 利用OTG設定PORT1 48 表4. 4 PTD設定結構(reserved的部分設0) 49 表4. 5 ATL、Interrupt、ISO設定(Reserved的部分設0) 50 表A. 1 ISP1362 HcRevision暫存器 71 表A. 2 ISP1362 HcControl暫存器 72 表A. 3 ISP1362 HcCommandStatus暫存器 73 表A. 4 ISP1362 HcInterruptStatus暫存器 74 表A. 5 ISP1362 HcInterruptEnable暫存器 75 表A. 6 ISP1362 HcInterruptDisable暫存器 76 表A. 7 ISP1362 HcFmInterval暫存器 77 表A. 8 ISP1362 HcFmRemaining暫存器 78 表A. 9 ISP1362 HcFmNumber暫存器 79 表A. 10 ISP1362 HcLSThreshold暫存器 79 表A. 11 ISP1362 HcRghDescriptorA暫存器 80 表A. 12 ISP1362 HcRhDescriptorB暫存器 81 表A. 13 ISP1362 HcRhStatus暫存器 82 表A. 14 ISP1362 HcRhPortStatus暫存器 84 表A. 15 ISP1362 HcChipID暫存器 86 表A. 16 ISP1362 HcScratch暫存器 86 表A. 17 ISP1362 HcSoftwareReset暫存器 86 表A. 18 ISP1362 HcBufferStatus暫存器 87 表A. 19 ISP1362 HcDirectAddressLength暫存器 88 表A. 20 ISP1362 HcDirectAddressData暫存器 89 表A. 21 ISP1362 HcATLBufferSize暫存器 89 表A. 22 ISP1362 HcATLBufferPort暫存器 89 表A. 23 ISP1362 HcATLPTDDoneMap暫存器 90 表A. 24 ISP1362 HcATLPTDSkipMap暫存器 92 表A. 25 ISP1362 HcATLLastPTD暫存器 92 表A. 26 ISP1362 HcATLCurrentActivePTD暫存器 93 表A. 27 ISP1362 HcATLPTDDoneThresholdCount暫存器 93 表A. 28 ISP1362 HcATLPTDDoneThresholdTimeOut暫存器 94 表A. 29 FPGA NIOS一般暫存器 94 表A. 30控制暫存器一覽表 96學號: 798440169, 學年度: 9

    Boot Tree Former.

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    Patent for a boot-tree former, which is used in boot manufacturing to form and stretch the shape of a boot

    Australian Boot Trade Employees' Federation Federal Council

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    Pictured standing L to R: J. Jammieson (NSW), C. Furness (TAS), L. McDonald (NSW), C. Rowe (SA), F. Harris (QLD), J. Cain (QLD). Pictured seated L to R: W. O'Connor (NSW), T. Richards (VIC, Treasurer), H. Spicer (SA, Vice-President), F. Windibank (VIC, President), A. Long (VIC, Federal Secretary), W. Forty (VIC)

    Maximum Entropy Bootstrap for Time Series: The meboot R Package

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    The maximum entropy bootstrap is an algorithm that creates an ensemble for time series inference. Stationarity is not required and the ensemble satisfies the ergodic theorem and the central limit theorem. The meboot R package implements such algorithm. This document introduces the procedure and illustrates its scope by means of several guided applications.

    Australian Boot Trade Federation First Employees Wages Board, Adelaide Branch

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    Pictured standing L to R: H. Hughes, F.C. Crooper. Pictured seated L to R: G.H. Rowe, W.P. Jackson, T.F. Molloy

    Gender and technology in the East Midlands boot and shoe industry : 1850-1911

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    Many scholars now consider that gender is an important category in historical study, but unfortunately many do not practice what they preach. Feminists have recognised for some time the importance of some form of historical analysis to feminism, or at least what Judith Allen calls 'a historically grounded feminism'. The protagonists in the debate disagree considerably, however, over the methodology which feminist historians should adopt. The various positions taken up have led to a schism between those who believe the feminist challenge to mainstream, or what Elizabeth Fox- Genovese calls 'official' history, should be mounted from within the discipline of history or from outside it. Judith Allen claims that the work which has been done in women's history to date serves to raise considerable doubt that accepting the discipline of history as presently constituted is a viable option for feminism. She sees the phallocentric characteristics of history as an obstacle to feminists using history. Allen feels that 'no less than Marxism, feminism is opposed by professional historians as an ahistorical grid of abstraction and prescription, threatening the integrity of the historical evidence.

    Boot camp for juvenile offenders

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    Title from Web page (viewed Jan. 23, 2008).; "September 22, 2000."; Discusses boot camps for juvenile offenders in other states.; Harvested from the web on 1/23/0
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