119,182 research outputs found
La città "bella" e lo schermo. Visioni dai Critofilm di urbanistica
No full textUn saggio sui "Critofilm" d'urbanistica di Carlo L. Ragghianti
Network-on-chip architectures and design methods
No full textSystem-on-Chip (SoC) represents the next major market for microelectronics, and there is considerable interest world-wide in developing effective methods and tools to support the SoC paradigm. SoC is an expanding field, at present the technical and technological literature about the overall state-of-the-art in SoC is dispersed across a wide spectrum which includes books, journals, and conference proceedings. The book provides a comprehensive and accessible source of state-of-the-art information on existing and emerging SoC key research areas, provided by leading experts in the field. This book covers the general principles of designing, validating and testing complex embedded computing systems and their underlying tradeoffs. The book has twenty five chapters organised into eight parts, each part focuses on a particular topic of SoC. Each chapter has some background covering the basic principles, and extensive list of references. It is aimed at graduate students,! designers and managers working in Electronic and Computer engineering
Il nuovo documentario italiano
No full text12 appuntamenti per scoprire modi di produzione e forme espressive dei nuovi documentaristi italiani. Académie de France à Rome, Villa Medici, 23 febbraio - 18 maggio 200
Fourth order partial differential equations on general geometries
No full textGreer, John B.; Bertozzi, Andrea L.; Sapiro, Guillermo. (2005). Fourth order partial differential equations on general geometries. Retrieved from the University Digital Conservancy, https://hdl.handle.net/11299/4114
Premiers résultats comparatifs sur la composition en lipides libres des souches Brucella Abortus B19, et Brucella Abortus 45/20
No full textLacave Ch., Le Garrec Yvonne, Bertozzi L. Premiers résultats comparatifs sur la composition en lipides libres des souches Brucella Abortus B19, et Brucella Abortus 45/20. In: Bulletin de l'Académie Vétérinaire de France tome 117 n°2, 1964. pp. 107-111
Azobenzene Photoswitches for Staudinger–Bertozzi Ligation
No full textA novel family of azobenzenes containing residues needed for aqueous Staudinger–Bertozzi ligation to azides was designed. The resulting photochromes show stable and reversible switching behavior in water, with a photostationary state (PSS) of up to 95:5 cis/trans. Applications in model systems include the modification of azide-bearing surfaces and proteins.
Battery Lifetime Optimization for Energy-Aware Circuits
No full textThe power consumption of integrated circuits is one of the most problematic considerations affecting the design of high-performance chips and portable devices. The study of power-saving design methodologies now must also include subjects such as systems on chips, embedded software, and the future of microelectronics. Low-Power Electronics Design covers all major aspects of low-power design of ICs in deep submicron technologies and addresses emerging topics related to future design. This volume explores, in individual chapters written by expert authors, the many low-power techniques born during the past decade. It also discusses the many different domains and disciplines that impact power consumption, including processors, complex circuits, software, CAD tools, and energy sources and management. The authors delve into what many specialists predict about the future by presenting techniques that are promising but are not yet reality. They investigate nanotechnologies, optical circuits, ad hoc networks, e-textiles, as well as human powered sources of energy. Low-Power Electronics Design delivers a complete picture of today's methods for reducing power, and also illustrates the advances in chip design that may be commonplace 10 or 15 years from now
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories
No full textIn spite of the mature cell structure, the memory controller architecture of Multi-level cell (MLC) NAND Flash memories is evolving fast in an attempt to improve the uncorrected/miscorrected bit error rate (UBER) and to provide a more flexible usage model where the performance-reliability trade-off point can be adjusted at runtime. However, optimization techniques in the memory controller architecture cannot avoid a strict trade-off between UBER and read throughput. In this paper, we show that co-optimizing ECC architecture configuration in the memory controller with program algorithm selection at the technology layer, a more flexible memory sub-system arises, which is capable of unprecedented trade-offs points between performance and reliabilit
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