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Comment On >Assessment Of Field-Induced Quantum Confinement In Heterogate Germanium Electron-Hole Bilayer Tunnel Field-Effect Transistor> Appl. Phys. Lett. 105, 082108 (2014)
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programNSF NASCENT ERCMicroelectronics Research CenterElectrical and Computer Engineerin
Going Beyond Counting First Authors in Author Co-citation Analysis
Get PDFThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Variations on the Author
Get PDF“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Appropriate Similarity Measures for Author Cocitation Analysis
Get PDFWe provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis
Dispelling the Myths Behind First-author Citation Counts
Get PDFWe conducted a full-scale evaluative citation analysis study of scholars in the XML research field to explore just how different from each other author rankings resulting from different citation counting methods actually are, and to demonstrate the capability of emerging data and tools on the Web in supporting more realistic citation counting methods. Our results contest some common arguments for the continued
use of first-author citation counts in the evaluation of scholars, such as high correlations between author rankings by first-author citation counts and other citation
counting methods, and high costs of using more realistic citation counting methods that are not well-supported by the ISI databases. It is argued that increasingly available digital full text research papers make it possible for citation analysis studies to go beyond what the ISI databases have directly supported and to employ more
sophisticated methods
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Ultra-shallow junction formation : co-implantation and rapid thermal annealing
No full texttextBoron diffusion and activation in the presence of co-implanted species are
studied experimentally and theoretically (ab initio Molecular Dynamics
simulations and SUPREM diffusion process simulator) in this dissertation.
Simulation results imply that B diffusion and activation in the presence of coimplanted
species can be affected through both the electronic and strain
compensation effects and the theoretical prediction is consistent with
experimental data. In the presence of co-implanted species, the electronic
bonding between B and the co-implant species makes it energetically unfavorable
for B to migrate when it comes close to the co-implant species. The bonding can
be characterized by the electronegativity difference between B and the coimplanted
species. The strain effect, on the other hand, indicates that B tends to
stay close to the larger co-implant species (In, for example) so that the strain
caused by the size misfit of In and Si can be compensated by the smaller B atom.
In order to have both the above factors be effective in B diffusion reduction, we
need to increase the concentration of the co-implant species in order to maximize
the B diffusion reduction with the co-implant technique. Experiments on B
diffusion and activation in the presence of Al, Ga, In, Ge, F and C, with or
without capping layers (oxide, nitride or Si), are conducted in this research.
Those species are incorporated into Si either by ion implantation or Chemical
Vapor Deposition (CVD) process. Boron and co-implant diffusion and activation
is studied Rapid Thermal Annealing (RTA) for various process parameters such
as ramp-up rate, soak time and peak temperature. Fundamental studies on the
interaction of B, defects and the co-implanted species are also included in this
dissertation.Electrical and Computer Engineerin
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Performance enhancement in column IV mobility, bandgap, and strain engineered MOSFETs
No full texttextSince the introduction of MOSFETs into the integrated circuit (IC), performance
has been improved by device scaling. As device dimensions have scaled into the sub-
100nm regime, the challenges to device scaling have become increasingly significant and
harder to surmount and other methods to complement scaling must be investigated and
introduced into the industry. Enhancing carrier mobility can increase drive current.
Compressively strained Si1-xGex and Si1-x-yGexCy provide a means of improving hole
mobility, while tensile strained Si enhances both hole and electron mobility. The use of
high-k gate dielectrics can increase MOSFET drive current while also increasing the ION
to IOFF ratio. HfO2 has gained prominence in the search for a Si-compatible high-k
dielectric.
In this work, tensile strained Si1-yCy films and compressively strained, Si1-xGex
and Si1-x-yGexCy films were grown via UHVCVD for device and process development
studies. A nanometer-scale fabrication process was developed to fabricate sub-100nm
PMOSFETs on these films, with both SiO2 and HfO2 being used as gate dielectrics.
From these devices it was determined that Si1-xGex can be used in buried channel (with
SiO2 gate dielectrics) and surface channel (with HfO2 gate dielectrics) to provide drive
current enhancement in deeply scaled devices.
This work demonstrates that higher mobility in Si1-xGex films can be used to
recover the mobility degradation caused by using high-k gate dielectrics. In addition to
drive current enhancement, it has been demonstrated that by process optimization,
desirable short channel effects can be achieved in these devices. It is also shown that
despite drive current enhancement at long channel length, deeply scaled Si1-x-yGexCy
PMOSFETs do not provide drive current enhancement over Si. However, they have
improved short channel effects.
In recent times tensile strained Si has emerged as a favorable choice to improve
carrier mobility and CMOS performance. As part of this work, hot-carrier degradation
was studied in tensile-strained Si NMOSFETs. In addition to increased mobility and
drive currents, it has been shown that these devices also possess decreased susceptibility
to hot-carrier degradation. Simulation and experimental results indicate that this was due
to the increased barrier to hot electron injection into the gate.Electrical and Computer Engineerin
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Silicon-germanium self-assembled quantum dot growth and applications in nanodevices
No full texttextDevice feature sizes have been reduced over the years and are now
approaching 100nm at mass production levels. To achieve further scaling down
of MOSFETs, single-electron devices utilizing the Coulomb blockade effect will
likely be the basic element of future solid-state electronics. To develop these
devices into commercial products, room temperature operation capability and
nano-scale structures are necessary. Silicon or SiGe quantum dots embedded in
an insulator have potential application for room temperature operation of singleelectron
transistor and nonvolatile memory devices.
In first study, direct growth of Ge dots on insulators, such as nitrided
oxides, which are suitable for tunneling oxides (3nm) in memory devices were
achieved. Germanium dots were grown at different temperatures on various
dielectric substrates, including Si3N4, SiO2, oxynitride, NH3-annealed oxynitride,
NH3-annealed nitride, and N2O-annealed nitrided oxide. The characteristics of
the Ge dots were investigated using atomic force microscopy (AFM), Auger
electron spectroscopy (AES) and X-ray photoelectron spectroscopy (XPS) in
order to find the mechanism of the Ge dot formation. On N2O annealed nitrided
oxide films, we obtained Ge dots with heights and diameters of 3.2nm and 11nm,
respectively. No Ge dots were formed on surfaces of the other dielectric
substrates studied at 550ºC. Our experimental results suggest that the surface of
N2O annealed nitrided oxide contains a large amount of defects such as dangling
bonds, which act as Ge nucleation sites.
In second study, SiGe quantum dot growth between 500ºC and 525ºC
using a Si2H6/GeH4/H2 based chemistry was studied. The nucleation and growth
characteristics of the SiGe dots were quantified by measuring the nuclei density
and the concentration of Ge on the oxide using scanning electron microscopy
(SEM), transmission electron microscopy (TEM), and AFM. For dielectrics, both
SiO2 and hafnium oxide (HfO2), high-K gate dielectric which uses thicker layer
for reduced leakage, improved resistance to boron diffusion, and better reliability
characteristics were used. The effect of GeH4 and Si2H6 pretreatment on the SiO2
surface was also investigated. It was found that Si atoms dominate the formation
of the critical nuclei and Ge atoms impinge on these Si atoms to grow the SiGe
dots. The number of Si atoms that terminate defect sites on SiO2 and the Si2H6
partial pressure determine the densities of SiGe dots. The growth of SiGe dots is
limited by the GeH4 partial pressure, which determines the activation energy of
disilane decomposition in the surface-reaction–limited regime and the number of
hydrogen desorption sites on the substrate.
In another study, the effects of charging voltage on charge retention
characteristics of SiGe dots with ZrO2 tunneling oxide were demonstrated. Using
this ZrO2 high-K dielectric tunneling oxide we achieved a lower write voltage
and an improved retention time compared to SiGe dots with a SiO2 tunneling
oxide. The discharge behavior in terms of a logarithmic charge decay of the ZrO2
device was similar to that of Si dots embedded in SiO2
Finally, a SiGe dot floating-gate flash memory with HfO2 tunneling oxide
was developed. Using SiGe dots and HfO2 tunneling oxide, which allows for a
thicker physical oxide thickness than an equivalent SiO2 tunneling oxide without
sacrificing non-volatility, a low program/erase voltage as well as good endurance
and charge retention characteristics can be achieved. This demonstrates that the
SiGe dots with HfO2 tunneling oxide can replace Si/Ge dots with SiO2 tunneling
oxide as a floating gate and have a high potential for further scaling of floating
gate memory devices.Materials Science and Engineerin
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