214 research outputs found
Dilip Kumar: autor-aktor
No full textDilip Kumar has been praised for his sublime dialog delivery, for his restrained gestures, and for his measured and controlled underplay of emotions in tragic stories as well as in light-hearted comedies. His debut in 1944 with Jwar Bhata (Ebb and Tide) met with less-than-flattering reviews. So did the next three films until his 1948 film, Jugnu (Firefly), which brought him recognition and success. Unlike his contemporaries such as Raj Kapoor and Dev Anand, who propelled their careers by launching their own production companies, Dilip Kumar relied on his talent, his unique approach to characterization, and his immersion in the projects he undertook. In the course of his career that spanned six decades, Kumar made only 62 films. However, his work is a textbook for other actors that followed. Not only did he bring respectability to a profession that had been shunned by the upper classes in India as a profession for “pimps and prostitutes,” but he also elevated film-acting and filmmaking to an academic discipline, making him worthy of the title ‘Professor Emeritus of Acting’. Rooted in the theoretical framework of Howard S. Becker’s work on the “production of culture” and “doing things together,” this paper discusses Kumar’s approach to acting, character development, and the level of his involvement and commitment to each of his projects. The author of this article argues that more than the creative control as a producer or a director, it is the artistic involvement and commitment of the main actors that shape great works of art in cinema. Dilip Kumar demonstrated it repeatedly.Dilip Kumar był chwalony za wysublimowane prowadzenie dialogów, opanowaną gestykulację oraz za wyważone i kontrolowane wyrażanie emocji zarówno w opowieściach tragicznych, jak też w beztroskich komediach. Jego debiut w 1944 w Jwar Bhata (Odpływy i przypływy) spotkał się z niezbyt pochlebnymi recenzjami. Podobnie było z kolejnymi trzema filmami, aż do filmu Jugnu (Świetlik) z 1948 roku, który przyniósł mu uznanie i sukces. W przeciwieństwie do swoich rówieśników, jak Raj Kapoor iDev Anand, którzy napędzali kariery, uruchamiając własne firmy produkcyjne, Dilip Kumar polegał na swoim talencie, unikalnym podejściu do charakteryzacji i zaangażowaniu w projekty, których się podjął. W ciągu swojej sześćdziesięcioletniej kariery Kumar nakręcił tylko 62 filmy. Jednak jego praca jest podręcznikowa dla młodszych aktorów. Nie tylko przyniósł szacunek zawodowi aktora, traktowanemu przez indyjskie klasy wyższe jako zawód „alfonsów i prostytutek”, ale także podniósł aktorstwo filmowe i filmowanie do dyscypliny akademickiej, co uczyniło Kumara godnym tytułu emerytowanego profesora aktorstwa. Artykuł ten, zakorzeniony w ramach teoretycznych pracy Howarda S. Beckera nad „produkcją kultury” i „robieniem rzeczy razem”, omawia podejście Kumara do aktorstwa i rozwoju postaci oraz poziom jego zaangażowania w każdy ze swoich projektów. Autor tego artykułu przekonuje, że to artystyczne zaangażowanie i poświęcenie głównych aktorów kształtują wielkie dzieła sztuki w kinie bardziej niż kontrola twórcza producenta czy reżysera. Dilip Kumar wielokrotnie to zademonstrował
Toward realizing power scalable and energy proportional high-speed wireline links
No full textGrowing computational demand and proliferation of cloud computing has placed high-speed
serial links at the center stage. Due to saturating energy efficiency improvements over the
last five years, increasing the data throughput comes at the cost of power consumption. Conventionally, serial link power can be reduced by optimizing individual building blocks such as
output drivers, receiver, or clock generation and distribution. However, this approach yields
very limited efficiency improvement. This dissertation takes an alternative approach toward
reducing the serial link power. Instead of optimizing the power of individual building blocks,
power of the entire serial link is reduced by exploiting serial link usage by the applications.
It has been demonstrated that serial links in servers are underutilized. On average, they
are used only 15% of the time, i.e. these links are idle for approximately 85% of the time.
Conventional links consume power during idle periods to maintain synchronization between
the transmitter and the receiver. However, by powering-off the link when idle and powering
it back when needed, power consumption of the serial link can be scaled proportionally to
its utilization. This approach of rapid power state transitioning is known as the rapid-on/off
approach. For the rapid-on/off to be effective, ideally the power-on time, off-state power,
and power state transition energy must all be close to zero. However, in practice, it is very
difficult to achieve these ideal conditions. Work presented in this dissertation addresses these
challenges.
When this research work was started (2011-12), there were only a couple of research papers
available in the area of rapid-on/off links. Systematic study or design of a rapid power state
transitioning in serial links was not available in the literature. Since rapid-on/off with
nanoseconds granularity is not a standard in any wireline communication, even the popular
test equipment does not support testing any such feature, neither any formal measurement methodology was available. All these circumstances made the beginning difficult. However,
these challenges provided a unique opportunity to explore new architectural techniques and
identify trade-offs. The key contributions of this dissertation are as follows.
The first and foremost contribution is understanding the underlying limitations of saturating energy efficiency improvements in serial links and why there is a compelling need to
find alternative ways to reduce the serial link power.
The second contribution is to identify potential power saving techniques and evaluate the
challenges they pose and the opportunities they present.
The third contribution is the design of a 5Gb/s transmitter with a rapid-on/off feature.
The transmitter achieves rapid-on/off capability in voltage mode output driver by using
a fast-digital regulator, and in the clock multiplier by accurate frequency pre-setting and
periodic reference insertion. To ease timing requirements, an improved edge replacement
logic circuit for the clock multiplier is proposed. Mathematical modeling of power-on time
as a function of various circuit parameters is also discussed. The proposed transmitter
demonstrates energy proportional operation over wide variations of link utilization, and is,
therefore, suitable for energy efficient links. Fabricated in 90nm CMOS technology, the
voltage mode driver, and the clock multiplier achieve power-on-time of only 2ns and 10ns,
respectively. This dissertation highlights key trade-off in the clock multiplier architecture,
to achieve fast power-on-lock capability at the cost of jitter performance.
The fourth contribution is the design of a 7GHz rapid-on/off LC-PLL based clock multi-
plier. The phase locked loop (PLL) based multiplier was developed to overcome the limita-
tions of the MDLL based approach. Proposed temperature compensated LC-PLL achieves
power-on-lock in 1ns.
The fifth and biggest contribution of this dissertation is the design of a 7Gb/s embedded
clock transceiver, which achieves rapid-on/off capability in LC-PLL, current-mode transmit-
ter and receiver. It was the first reported design of a complete transceiver, with an embedded
clock architecture, having rapid-on/off capability. Background phase calibration technique in
PLL and CDR phase calibration logic in the receiver enable instantaneous lock on power-on.
The proposed transceiver demonstrates power scalability with a wide range of link utiliza-
tion and, therefore, helps in improving overall system efficiency. Fabricated in 65nm CMOS technology, the 7Gb/s transceiver achieves power-on-lock in less than 20ns. The transceiver
achieves power scaling by 44x (63.7mW-to-1.43mW) and energy efficiency degradation by
only 2.2x (9.1pJ/bit-to-20.5pJ/bit), when the effective data rate (link utilization) changes
by 100x (7Gb/s-to-70Mb/s).
The sixth and final contribution is the design of a temperature sensor to compensate
the frequency drifts due to temperature variations, during long power-off periods, in the
fast power-on-lock LC-PLL. The proposed self-referenced VCO-based temperature sensor
is designed with all digital logic gates and achieves low supply sensitivity. This sensor is
suitable for integration in processor and DRAM environments. The proposed sensor works
on the principle of directly converting temperature information to frequency and finally
to digital bits. A novel sensing technique is proposed in which temperature information
is acquired by creating a threshold voltage difference between the transistors used in the
oscillators. Reduced supply sensitivity is achieved by employing junction capacitance, and
the overhead of voltage regulators and an external ideal reference frequency is avoided. The
effect of VCO phase noise on the sensor resolution is mathematically evaluated. Fabricated
in the 65nm CMOS process, the prototype can operate with a supply ranging from 0.85V
to 1.1V, and it achieves a supply sensitivity of 0.034oC/mV and an inaccuracy of ±0.9oC
and ±2.3oC from 0-100oC after 2-point calibration, with and without static nonlinearity
correction, respectively. It achieves a resolution of 0.3oC, resolution FoM of 0.3(nJ/conv)res2 ,
and measurement (conversion) time of 6.5μs.Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2017-12-01The student, Tejasvi Anand, accepted the attached license on 2015-11-20 at 13:54.The student, Tejasvi Anand, submitted this Dissertation for approval on 2015-11-20 at 14:12.This Dissertation was approved for publication on 2015-11-24 at 13:47.DSpace SAF Submission Ingestion Package generated from Vireo submission #8817 on 2016-03-02 at 14:13:14Made available in DSpace on 2016-03-02T21:06:34Z (GMT). No. of bitstreams: 2
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Key Author Analysis in Research Professionals’ Relationship Network Using Citation Indices and Centrality
No full textAbstractIn social network analysis, the importance of an actor can be found by using the centrality metrics. There are many centrality metrics available e.g. degree, closeness, betweenness, eigenvector etc. In research community authors forms a social network, which is called Research Professionals’ Collaboration Network. This is similar to social network where each author is an actor and an article written together by some authors establishes collaboration between them. Each author acquires a certain value based on the citation of their articles. There are many citation indices are available such as citation count, h-index, g-index, i10-index etc. To analyze the Research Professionals’ collaboration Network and for finding the key author, the citation indices can be used. In this paper, we compare and combine both social network analysis metrics and the citation indices to get better result in finding the key author
Reflection of Social Evils and Humanism in the Major Novels of Mulk Raj Anand
No full textA writer does not come from the alien but he or she is a product of contemporary society. In the works of a particular author, the reflection of contemporary life can be seen. Mulk Raj Anand is not an exception of it. In the works of the writer, a reflection of contemporary social and political life, a reflection of true human emotion and feeling and love for humanity can be seen easily. The writer considered art should be for life's sake. There should be a reflection of contemporary society. As a true reformist as well as a humanist, he wanted to bring radical change to society. He attacked the contemporary social evils namely untouchability, casteism, capitalism, feudalism, imperialism, colonialism, century-old conventions, and religious orthodoxy which hamper the overall development of Indian people. He not only attacked but also inculcated in them human values and made the people aware of the suffering and exploitation of untouchables, the poor, the women, and the common masses. He tried to inculcate the feeling of love and friendship in the mind of the people. Human dignity is the highest among all the fundamental rights. The writer has fought for the liberty, equality, justice, and basic human needs of the people. Bakha, Munoo, and other major characters of different novels are only metaphors to present human miseries and solutions for same and send a message to the people to be aware of the human miseries and in our action, such activity should not come which can hurt the feeling of the others. Complete abolition of social evils is the demand of the present time
Soft switched high frequency ac-link converter
No full textVariable frequency drives typically have employed dc voltage or current links
for power distribution between the input and output converters and as a means to
temporarily store energy. The dc link based power conversion systems have several
inherent limitations. One of the important limitations is the high switching loss
and high device stress which occur during switching intervals. This severely reduces
the practical switching frequencies. Additionally, while the cost, size, and weight of
the basic voltage sourced PWM drive is attractive, difficulties with input harmonics,
output dV/dt and over-voltage, EMI/RFI, tripping with voltage sags, and other
problems significantly diminish the economic competiveness of these drives. Add-ons
are available to mitigate these problems, but may result in doubling or tripling the
total costs and losses, with accompanying large increases in volume and weight.
This research investigates the design, control, operation and efficiency calculation
of a new power converter topology for medium and high power ac-ac, ac-dc and
dc-ac applications. An ac-link formed by an inductor-capacitor pair replaces the
conventional dc-link. Each leg of the converter is formed by two bidirectional switches.
Power transfer from input to output is accomplished via a link inductor which is first
charged from the input phases, then discharged to the output phases with a precisely
controllable current PWM technique. Capacitance in parallel with the link inductor
produces low turn-off losses. Turn-on is always at zero voltage as each switch swings
from reverse to forward bias. Reverse recovery is with low dI/dt and also is buffered
due to the link capacitance
Challenges in fluid flow simulations using Exascale computing
No full textIn this paper, I discuss the challenges in porting hydrodynamic codes to futuristic exascale HPC systems. In particular, we describe the computational complexities of finite difference method, pseudo-spectral method, and Fast Fourier Transform (FFT). We show how global data communication among the processors brings down the efficiency of pseudo-spectral codes and FFT. It is argued that FFT scaling may saturate at 1/2 million processors. However, finite difference and finite volume codes scale well beyond million processors, hence they are likely candidates to be tried on exascale systems. The codes based on spectral-element and Fourier continuation, that are more accurate than finite difference, could also scale well on such systems.The author thanks all the co-developers of FFTK, TARANG, and finite difference code of our group. Some of the key contributors to the codes are Anando Chatterjee, Rosan Samuel, Shaswat Bhattacharya, Ravi Samtaney, Fahad Anwer, Gaurav Gautam, Abhishek Kumar, Mani Chandra, Akash Anand, Awanish Tiwari, and Soumyadeep Chatterjee. In addition, author is grateful to Akash Anand, Samar Aseeri, Rooh Khurram, Bilel Hadri, V. Balaji, and Preeti Malakar for discussion and ideas; and to Ritu Arora, Venkatesh Shenoy, and Amitava Majumdar for organzing wonderful conference “Software Challenges to Exascale Computing (SCEC)”. Funding: This study was funded by research grants INT/RUS/RSF/P-03 by the Department of Science and Technology India. Our numerical simulations were performed on Cray XC40 (Shaheen II) and Blue Gene/P (Shaheen I) at KAUST supercomputing laboratory, Saudi Arabia, through project k105
Development of Co/Co9S8 metallic nanowire anchored on N-doped CNTs through the pyrolysis of melamine for overall water splitting
No full textHerein, we report the successful synthesis of Co9S8 metal-sulfide nanowire trapped in multi walled carbon nanotube (MWCNT), which was subsequently found to be an effective catalyst for water splitting. Melamine pyrolysis together with a Co precursor results in MWCNTs, with the addition of sulfur during synthesis enhancing the surface area, pore size, and oxygen vacancy defects in the nanotubes. The hierarchical structure of Co/Co9S8/CNT products boosted the electron mobility and mass transport for both the oxygen evolution (OER) and hydrogen evolution reaction (HER) in alkaline medium. Doping the catalyst surface with Pyridinic-N atoms, Graphitic-N atoms and thioamide S-atoms dramatically improved the bifunctional electrocatalytic performance by lowering the overpotentials for OER and HER reactions. The Co/Co9S8/CNT generated a current density of 10 mAcm?2 water-splitting current by applying a cell voltage of only 1.5 V. Further, Co/Co9S8/CNT showed excellent stability. The mechanism of Co8S9 nanowire formation in the MWCNT was also investigated.This publication was made possible by NPRP Grant (NPRP8-145-2-066) from the Qatar National Research Fund (a member of Qatar Foundation). The statements made herein are solely the responsibility of the author(s). The authors also wish to gratefully acknowledge Centre of Advanced Materials (CAM) and Gas Processing Center (GPC) at Qatar University for XRD and XPS analysis respectively. The SEM analysis was accomplished in the Central Laboratories Unit, Qatar University. The authors would also like to acknowledge QEERI Core Labs for their support related to the TEM characterization. Open Access funding provided by the Qatar National Library. The raw data required to reproduce these findings cannot be shared at this time as the data also forms part of an ongoing study. The processed data required to reproduce these findings cannot be shared at this time as the data also forms part of an ongoing study. Anchu Ashok: Conceptualization, Methodology, Data curation, Formal analysis, Investigation, Validation, Writing - Original draft, Anand Kumar: Conceptualization, Supervision, Writing - Review & Editing, Project administration, Funding acquisition, Janarthanan Ponraj: Visualization, Investigation, Said A. Mansour: Visualization, InvestigationScopu
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