1,721,007 research outputs found
Filtering drowsy instruction cache to achieve better efficiency
No full textLeakage power in cache memories represents a sizable fraction of total power consumption, and many techniques have been proposed to reduce it. As a matter of fact, during a fixed period of time, only a small subset of cache lines is used. Previous techniques put unused lines, for example, to drowsy in order to save power. Our idea is to adaptively select the most used cache lines. In the case of instruction cache, we found that this can automatically achieved by coupling a tiny cache acting as a filter cache (IL0 cache) with a drowsy-cache. Our experiments, with complete MiBench suite for ARM based processor, show a 25% improvement in leakage saving versus drowsy
Reducing leakage in power-saving capable caches for embedded systems by using a filter cache
No full textLeakage power in data cache memories represents a sizable fraction of total power consumption, and many techniques have been proposed to reduce it. As a matter of fact, during a fixed period of time, only a small subset of cache lines is used. Previous techniques put unused lines, for example, to drowsy state or switch them off completely (cache decay) in order to save power. Our idea is to adaptively select mostly used cache lines. We found that this can be achieved automatically by using a tiny cache acting as a filter L0 cache. Our main contributions are: i) evaluation of filter cache to reduce leakage; ii) improvement of other existing power-saving techniques; iii) providing results to select the most promising solution. Our experiments, with complete MiBench suite for ARM based processor, show (in average) 10% improvement in leakage saving and 17% in leakage energy-delay versus drowsy-cache; versus decay-cache we found 6% improvement in leakage saving and 13% in leakage energy-delay
Reducing Leakage through Filter Cache
Get PDFWe evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay techniques. We discovered that a filter cache, traditionally used for reducing active power, can help reduce also leakage. The key idea is to reduce the lifetime of the lines that are in high-power state inside a leakage-saving cache. Power consumption has become one of the main concerns for designers, together with the performance. Caches account for the largest fraction of on-chip transistors in most modern processors. Therefore, they are a primary candidate for attacking the problem of the leakage. In average, for instruction cache 24\% improvement in leakage savings and 1.5\% in IPC (Instruction Per Cycle) can be achieved with respect to drowsy cache. For data caches, 5\% and 5.4\% improvement can be achieved respectively. Experiments have been performed also with decay cache showing fewer benefits
Elliptic Curve Cryptography support for ARM based Embedded systems
No full textElliptic Curve Cryptography (ECC) is emerging as an attractive approach to public-key cryptography for constrained environments, because of the small key sizes and computational efficiency, while preserving the same security level as the standard methods. The performance of public-key cryptography methods is critical in embedded environments such as applications for wireless, handheld internet devices and smartcards with small memory and strict CPU-latency constraints. Power control is also important for embedded systems as well as security against Differential Power Analysis (DPA). We examined the performance of a set of ECC kernel benchmarks and proposed ISA extensions to support secure and efficient execution, on a ARM processor, which is a very common platform for embedded system applications. An evaluation of possible ARM instruction set extension for Elliptic Curve Cryptography over binary finite fields GF(2m) is presented. With almost no cost at hardware level, we found an average 33% reduction of the total number of dynamically executed instructions. Finally, we analyzed the power requirement to achieve an efficient and secure execution from a power standpoint. Some preliminary results showing the power consumption of the benchmarks are presented
Exploiting Locality to Improve Leakage Reduction in Embedded Drowsy I-Caches at Same Area/Speed
Get PDFIn this paper, a technique to reduce the leakage
power consumption in embedded drowsy instruction caches (I
caches) is proposed. The technique is called .Improved Drowsy.
(ID), and adopts a more efficient strategy than standard Drowsy
Caches (DCs) to turn off unused cache lines, based on locality.
The implementation of ID caches requires minor changes, and
the area/speed overhead associated with the additional circuitry
is insignificant. The proposed technique is assessed through
circuit and cycle accurate simulations on an L1 instruction
cache embedded in an ARM XScale processor based system in a
65 nm CMOS technology. Results show that this technique is
able to reduce the leakage power by 69\% on average. Leakage of
DC is shown to be significantly lowered with the proposed ID
approach, being DC leakage greater than that of ID by up to
53\%, and 10 15\% typically
Going Beyond Counting First Authors in Author Co-citation Analysis
Get PDFThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Variations on the Author
Get PDF“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Appropriate Similarity Measures for Author Cocitation Analysis
Get PDFWe provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis
Dispelling the Myths Behind First-author Citation Counts
Get PDFWe conducted a full-scale evaluative citation analysis study of scholars in the XML research field to explore just how different from each other author rankings resulting from different citation counting methods actually are, and to demonstrate the capability of emerging data and tools on the Web in supporting more realistic citation counting methods. Our results contest some common arguments for the continued
use of first-author citation counts in the evaluation of scholars, such as high correlations between author rankings by first-author citation counts and other citation
counting methods, and high costs of using more realistic citation counting methods that are not well-supported by the ISI databases. It is argued that increasingly available digital full text research papers make it possible for citation analysis studies to go beyond what the ISI databases have directly supported and to employ more
sophisticated methods
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