1,720,970 research outputs found
Switched-Device Power Amplier using Bias Control
No full textIn this work, a switched-device power amplier using bias control is designed and realized. The PA operates at a frequency of 100MHz. Test results show that the PA achieves a PAE of 63% at −6dB power back-off and 60% at the peak output power of 40dBm. First, an overview of the state-of-the-art PA technology and performance in high PAPR applications is given. The state-of-the-art analysis is then used to set up the requirements of the PA and to compare the results to in the end. The design of the PA is explained in detail, followed by an evaluation of the simulated and measured results. Notable observations of the performance measurements are also discussed. After the concluding remarks regarding this work are given, recommendations on how to improve the performance and to extend the concept of the proposed switched-device PA are presented.Electrical Engineering, Mathematics and Computer ScienceElectronics Research Laboratory (ELCA
All-Digital I/Q RF-DAC
No full textDue to the severe cost pressure of consumer electronics, a migration to an advanced nanoscale CMOS processes, which is primarily developed for fast and low-power digital circuits operating at low supply voltages, is necessary, but it forces wireless RF transceivers to exploit more and more digital circuitry. These basic CMOS properties tend to coerce the design of wireless functions towards the digital domain where transistors are utilized as switches rather than current sources. Within the past decade, there have been tremendous efforts towards implementing fully-digital or digitally-intensive RF transmitters in which they demonstrate transmitter designs that operate from baseband up to the pre-power amplifier (PA) stage entirely in the digital domain. In view of this digitalization, the RF transmitter modulator, being the nearest to the antenna as it converts digital baseband modulation samples into an RF waveform, is considered the most critical building block of the transmitter, and it can be in the form of either a polar, Cartesian (I/Q), or an outphasing topology. For wide modulation bandwidths, due to their direct linear summation of the in-phase (I) and quadrature-phase (Q) signals and thus the avoidance of the bandwidth expansion, Cartesian modulators are substantiated as the most appropriate choice over their polar or outphasing counterparts. Since the effective modulating sample resolution is the utmost important parameter as it directly impacts the achievable dynamic range, linearity, error vector magnitude (EVM), noise floor, and out-of-band spectral emission, this thesis proposes a wideband, high-resolution, all-digital orthogonal I/Q radio-frequency digital-to-analog (RF-DAC). Chapter 1 briefly provides an overview of the conventional RF radio building blocks. It is discussed that contemporary RF transceivers must support most of multi-mode/multiband communication standards such as Wi-Fi, Bluetooth, and Fourth Generation (4G) of 3GPP cellular. In Chapter 2, four types of RF transmitter architectures have been briefly described. The analog I/Q modulators are the most straightforward and widely employed RF transmitters. They are later replaced by analog polar counterparts to address their poor power efficiency and noise performance. On the other hand, in the analog polar RF transmitters, their related amplitude and phase signals must be aligned or spectral regrowth is inevitable. Utilizing digitally intensive polar RF transmitters mitigates the latter alignment issue. Nonetheless, polar transmitters suffer from an additional issue that is related to their nonlinear conversion of in-phase and quadrature-phase signals into the amplitude and phase representation. Therefore, the polar RF transmitters are not able to manage very large baseband bandwidth of the most stringent communication standards, therefore, reusing I/Q modulators based on digitally intensive implementation appears to be a reasonable approach to resolve this issue. The digital I/Q RF transmitters, however, suffer again from inadequate power efficiency. Moreover, the combination of in-phase and quadrature phase paths must be orthogonal to produce an undistorted-upconverted-modulated RF signal. In Chapter 3, a novel all-digital I/Q RF modulator is described. Employing an upconverting RF clock with a 25% duty cycle ensures the orthogonal summation of Ipath and Qpath, which avoids nonlinear signal distortion. It was clarified that electric summing of I and Q digital unit array switches is the most appropriate I/Q orthogonal summation approach. Moreover, to address all four quadrants of the constellation diagram, the differential quadrature upconverting RF clocks must be utilized. In addition, it was explained that employing switches instead of utilizing current sources leads to superior noise performance of the all-digital I/Q transmitter. In Chapter 4, a novel 2×3-bit all-digital I/Q (Cartesian) RF transmit modulator is implemented which operates as an RF-DAC. The modulator performs based on the concept of orthogonal summing, which is introduced and elaborated in Chapter 3. It is based on a time-division duplexing (TDD) manner of an orthogonal I/Q addition. By employing this method, a very simple and compact design featuring high-output power, power-efficiency and low-EVM has been realized. The resolution of the experimental RF-DAC presented in this work is only 3-bit (including one sign bit), but it will be demonstrated in the following chapters that the resolution can be increased to 8–12 bits in an unequivocal manner for utilization in multi-standard wireless applications. In Chapter 5, the system design considerations of the proposed high-resolution, wideband all-digital I/Q RF-DAC are discussed. It is demonstrated that the upsampling clock frequency (fCKR), DRAC resolution (Nb), and memory length (lmem) are three important parameters that affect the dynamic performance of the proposed RF-DAC. Based on system level simulation results and the limitation in implementing the RF-DAC test-chip, they are designated as fCKR=300 MHz, Nb=12 bit, and lmem=8 k-word. The effect of these parameters on the in-band as well as out-of-band performance of RF-DAC are investigated. It is concluded that exploiting 13 bits of resolution for quadrature baseband signals is sufficient to meet the most stringent communication requirements. In Chapter 6, the theory and the design procedure of an innovative, differential, orthogonal power combining network, which is employed in the proposed all-digital modulator, is thoroughly explained. It is demonstrated that, in order to maintain an orthogonal operation between the in-phase and quadrature-phase paths, the effect of the power combiner on the in-phase and quadrature-phase paths must be considered, otherwise, the linear summation will not occur. As a result, the EVM and linearity performance will diminish. The power combiner consists of a transformer balun as well as its related programmable primary and secondary shunt capacitors. In order to achieve high efficiency at full power of operation, a class-E type matching network is adopted and subsequently modified in order to obtain a minimum modulation error. A switchable cascode structure is exploited to mitigate a reliability issue as well as to perform a mixer operation. Moreover, utilizing a switchable cascode structure also improves the isolation between quadrature paths. Furthermore, it is explained that the power combiner efficiency is primarily related to the transformer balun efficiency. A procedure is introduced in order to design an efficient, compact balun transformer. Also, it is explained that the RF-DAC operates as a class-B power amplifier at the power back-off levels. As a result, its performance in the power back-off region is lowered. In Chapter 7, the implemented wideband, 2×13-bit I/Q RF-DAC-based all-digital modulator realized in 65-nm CMOS is presented. Employing the orthogonal I/Q combining approach which is proposed in Chapter 3 guarantees the isolation between in-phase and quadrature-phase paths. The 4×f0 off-chip single-ended clock is converted to a differential version employing an on-chip transformer. The wide swing, low phase noise, high-speed dividers are incorporated to translate the 4×f0 differential clock to the fundamental frequency of f0. In the meantime, the complementary quadrature sign bit is used to address four quadrants of the related constellation diagram. The 25% differential quadrature clocks are generated using logic-AND operation between 2×f0 differential clock and f0 differential quadrature clocks. The 12-bit DRAC is implemented employing a segmentation approach, which consists of 256 MSB and 16 LSB thermometer unit cells. The layout arrangement of the DRAC unit cell proves to be very crucial. It was concluded that the vertical layout would be the most appropriate selection. The LO leakage and I/Q image rejection technique as well as two DPD memoryless techniques of AM-AM/AM-PM and constellation mapping are introduced, which will be extensively utilized in the measurement segment. In Chapter 8, the high-resolution wideband 2×13-bit all-digital I/Q transmitter, which was introduced in Chapter 7, is thoroughly measured. First, the chip is tested in continuouswave mode operation. It is demonstrated that, with a 1.3V supply and, of course, an on-chip power combiner, the RF-DAC chip generates more than 21dBm RF output power within a frequency range of 1.36–2.51 GHz. The peak RF output power, overall system, and drain energy efficiencies of the modulator are 22.8 dBm, 34%, and 42%, respectively. The measured static noise floor is below -160 dBc/Hz. The digital I/Q RF modulator demonstrates an IQ image rejection and LO leakage of -65 dBc and -68 dBc, respectively. The RF-DAC could be linearized employing either of the two digital predistortion (DPD) approaches: memoryless polynomial or a lookup table. Its linearity is examined utilizing 4/16/64/256/1024-QAM baseband signals while their related modulation bandwidth can be as high as 154 MHz. Using AM-AM/AM-PM DPD improves the linearity by more than 25 dB while the measured EVM is better than -28 dB. Moreover, the constellation-mapping DPD is applied to the RF-DAC which improves linearity by more than 19 dB. These numbers indicate that this innovative concept is a viable option for the next generations of multi band/multi-standard transmitters. The realized demonstrator can perform as an energy-efficient RF-DAC in a stand-alone digital transmitter directly (e.g., for WLAN) or as a pre-driver for high-power basestation PAs. Chapter 9 draws the conclusions of the this thesis work and provides recommendations for future research and directions in the field of all-digital RF transmitters for wireless communication applications.Microelectronics & Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc
Wideband Hybrid-Class Power Amplifier for Base Station Applications Using LDMOS with Envelope Tracking System
No full textConventional RF power amplifiers are normally designed for peak efficiency at maximum output power. However, for WCDMA application, the power amplifier often operates at 6-8 dB power back-off. Consequently, when the power is backed-off from its peak point, the efficiency of conventional power amplifier drops sharply. The envelope elimination and restoration (EER) and envelope tracking (ET) systems are two of the most promising techniques that can provide high efficiency at power back-off point. In this project, a RF power amplifier optimized for average efficiency according to the PDF of WCDMA signal has been designed using NXP generation 7 LDMOS. In addition, to meet the increasing demand for wireless communication terminals to handle wideband operation, a 1GHz bandwidth power amplifier optimized for efficiency at power back-off has been designed and fabricated. The measurement results are proved to have a good agreement with simulation results.Hi-Tech groupElectrical Engineering, Mathematics and Computer Scienc
A 10Gb/s PI-CDR design
No full textIn this thesis the design and analysis of a dual-loop phase interpolator(PI) clock and data recovery(CDR) with a Delay locked loop (DLL) as a reference loop will be discussed.Computer Scienc
An FM Chirp Waveform Generator and Detector for Radar: Baseband, intermediate frequency, low noise and RF power amplifiers
No full textThis report describes the design of different amplifiers that are part of an FM transceiver. This is part of a larger project, which has the objective to design a complete FM transceiver from discrete components only, meaning that IC technology is not considered. The circuits designed are two baseband amplifiers, an intermediate frequency amplifier, a low noise amplifier and an RF power amplifier. The baseband amplifiers are implemented with a Darlington pair in common-collector configuration to achieve a high input resistance, low output resistance, and unity gain transfer. The intermediate frequency amplifier is centered at 9.95 MHz with a -3dB bandwidth of 2 MHz. The maximum gain is 40.5 dB and can be lowered with up to 39.7 dB using a potentiometer, based on the emitter degeneration principle. The low noise amplifier has a maximum noise figure of 1.4 dB over the RF carrier band of 88 to 108 MHz. It has a gain of 33 dB, and reaches its 1 dB compression point for an input of -33 dBm. The total harmonic distortion is less than 0.3%. A class E power amplifier is designed with an efficiency of 72.9%, a transmit power of 3.1 W, and a gain of 31.8 dB. Furthermore, this reports also presents a systematic design approach for amplifiers, which illustrate the core principles on which all the designs are based.Electrical Engineerin
Going Beyond Counting First Authors in Author Co-citation Analysis
Full text linkThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Energy Efficient Wideband Supply Interpolating Transmitter for Millimeter-Wave 5G System
No full textIn 5G transmitters, high efficiency, high linearity, and compatibility with MIMO and beamforming techniques are of utmost importance. Typically, enhancement techniques like supply modulation or load modulation are used when dealing with envelope modulated communication signals, which increasingly have high peak-to-average-power ratios (PAPR). Supply modulation is most favored in handsets. Techniques like "Envelope Tracking (ET)" or "Envelope Elimination and Restoration (EER)" are employed to generate high efficiency over a large power back-off range. These techniques are robust to antenna impedance variations compared to load modulation techniques like Doherty. However, the downside of supply voltage modulation is the need for a dynamic supply modulator. Such supply modulators are very difficult to implement for systems with video bandwidths >20MHz. For modern communication systems like 5G, video bandwidths for both the base stations and handsets are drastically increasing (up to ~1GHz). 5G communication is also going to operate at very high frequencies, commonly known as mm-wave. This degrades the efficiency of the transmitter because of increased losses in the output conductance of the active device and from any power combining network. Furthermore, due to the use of (massive) MIMO/smart-antenna techniques in these 5G base stations, there will also be undesired time-fluctuating antenna impedances due to PA back-coupling through the antenna array, which are extremely difficult to handle in efficiency enhancement techniques based on load modulation. In this thesis, a new type of wideband "supply voltage modulation" has been investigated. The aimed concept uses multiple constant supply voltages rather than a single time variant dynamic voltage supply. Several "parallel" PA devices are connected to different DC supply voltages while their RF output terminals are AC connected. The PA connected to a lower DC supply is used in the low power region, while the PA with a higher DC supply is used in the high power region. This ensures that the DC power consumption is output power dependent. By gradually controlling the amplifier branches through their RF inputs, proper transitions can be made between the different amplifier branches (i.e., from low power to high power region and vice versa)gENESIsNXP STWElectrical Engineering | Microelectronic
Variations on the Author
Full text link“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Digital-Intensive Up-Converters for Wireless Communication
No full textThis thesis focuses on digital-intensive up-converters for sub-6GHz wireless communication. Nowadays, wireless cellular communication is entering its 5th generation (5G), driven by the demand for faster mobile access and higher data throughput. 5G utilizes larger modulation bandwidths, higher-order modulations, and (many) more transmitters and receivers than its precessors, requiring higher system efficiency, flexibility, and integration of the transmitter (TX). An essential building block in the TX system is the RF modulator that converts the baseband data to an RF signal. New modulator architectures and circuits are required to handle the increased 5G modulation bandwidths linearly and energy-efficiently. Along with the progress in wireless communication, nano-scale CMOS technologies are advancing toward their physical limitations. Transistors have become smaller and more suited towards digital signal processing (DSP). Moreover, their high-frequency performance has improved, enabling RF analog/mixed-signal circuits. These improvements offer digital-intensive transmitters (DTXs) the opportunity to enter a territory that has been the traditional stronghold of analog-intensive TXs. Consequently, the research question of this dissertation is “What if we change the nature of the RF front-end, such that we can start truly benefiting from the power of CMOS in “digital” (switching) operations?” This thesis proposes new digital-intensive TX line-ups and up-converters architectures with enhanced linearity, bandwidth, and power efficiency to answer this question...Electronic
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