1,720,972 research outputs found
Power Distribution for the ATLAS LAr Trigger Digitizer Board
The R&D activity for the design of the power distribution section of the ATLAS Liquid Argon (LAr) Calorimeter Trigger Digitizer Board board (LTDB) is presented. Many aspects concerning the radiation hardness and the ability to operate Point-of-load converters also in presence of high magnetic fields are covered. Devices designed by CERN for experiments at LHC have been used and their capability for implementation in the LTDB has been exploited with the aim to have a power distribution section with the required performances. (ATL-LARG-PROC-2015-008
Development of the Trigger Readout System for Phase-I Upgrade of the ATLAS Liquid Argon Calorimeters
The ATLAS Liquid Argon (LAr) Calorimeters were designed and built to measure electromagnetic and hadronic energy in proton-proton collisions produced at the LHC at centre-of-mass energies up to 14 TeV and at instantaneous luminosities up to 10^34 cm^-2s^-1. An LHC upgrade is planned to enhance the luminosities to 2-3 x 10^34 cm^-2 s^-1 and to deliver an integrated luminosity of about 300 fb^-1 during Run 3 from 2019 through 2021. In order to improve the identification performance for electrons, photons, taus, jets, missing energy at high background rejection rates, an improved spatial granularity of the trigger primitives has been proposed. Therefore, a new trigger readout system is being designed to digitize and process the signals with higher spatial granularity. A demonstrator system has been developed and installed on the ATLAS detector to evaluate the technical and performance aspects. Analog signal parameters including noise and cross-talk have been analyzed. The performance of the new readout system is being measured and experience will be gained for the development and construction of the full trigger readout system during the data taking run starting 2015. The performance of the demonstrator system in the data taking run will be presented. Based on the demonstrator system, the next generation of prototypes for the trigger readout system is being developed. In this talk, research and development of radiation tolerant custom ASICs for the final trigger readout system will be discussed
Development of the ATLAS Liquid Argon Calorimeter Readout Electronics for the HL-LHC
A new era of hadron collisions will start around 2027 with the High-Luminosity LHC, that will allow to collect ten times more data that what has been collected since 10 years at LHC. This is at the price of higher instantaneous luminosity and higher number of collisions per bunch crossing. In order to withstand the high expected radiation doses, the ATLAS Liquid Argon Calorimeter readout electronics will be upgraded. The electronic readout chain is made of 4 main parts. The new front-end board will allow to amplify, shape and digitise on two gains the ionisation calorimeter signal over a dynamic range of 16 bits and 11 bit precision. Low noise below Minimum Ionising Particle (MIP), i.e below 120 nA for 45 ns peaking time, and maximum non-linearity of two per mil are required. Custom low noise preamplifier and shaper are being developed to meet these requirements using 65 nm and 130 nm CMOS technologies. They should be stable under irradiation until 1.4kGy (TID) and 4.1x10^13 new/cm^2 (NIEL). Two concurrents preamp-shaper ASICs have been developed and the best one in term of noise has been chosen. The test results of the new version of this ASIC will be presented. A new ADC chip prototype has been also submitted in June. Integration tests of the different components (including lpGBT links developed by CERN) on a 32-channels front-end board are ongoing, and results of this integration will be also shown. The new calibration board will allow the precise calibration of all 128000 channels of the calorimeter over a 16 bits dynamic range. A non-linearity of one per mil and non-uniformity between channels of 0.25% with a pulse rise time smaller than 1ns should be achieved. In addition, the custom calibration ASICs should be stable under irradiation with same levels as preamp-shaper and ADC chips. The HV SOI CMOS XFAB 180nm technology is used for the pulser ASIC, while the TSMC 130 nm technology is now used for the DAC part. During second prototype testing, it was found that the DAC part of the calibration system, inserted previously with the pulser in XFAB 180nm technology, was not rad-hard, already after 0.5 kGy. This is why a third version has been designed overcoming this issue, and all results will be presented. The data are sent off-detector at 40 MHz where FPGAs connected through high-speed links will perform energy and time reconstruction through the application of corrections and digital filtering. The off-detector electronics receive 345 Tbps from front-end readout, which require 33000 links at 10 Gbps. For the first time, online machine learning technics are used in the FPGAs in order to better filter the data. The first test results of the signal processing board will be shown. Reduced data are then sent with low latency to the first level trigger, while the full data are buffered until the reception of trigger accept signals. The data-processing, control and timing functions are realized by dedicated boards connected through ATCA crates. Design status of this timing boards will be shown too
The Phase-I Trigger Readout Electronics Upgrade of the ATLAS Liquid Argon Calorimeters
Electronics developments are pursued for the trigger readout of the ATLAS Liquid-Argon Calorimeter towards the Phase-I upgrade scheduled in the LHC shut-down period of 2019-2020. Trigger signals with higher spatial granularity and higher precision are needed in order to improve the identification efficiencies of electrons, photons, tau, jets and missing energy, at high background rejection rates, already at the Level-1 trigger. The LAr Trigger Digitizer system will digitize the 34,000 channels (SuperCells) at a 40 MHz sampling frequency with 12 bit precision after the bipolar shaping of the front-end system. The data will be transmitted to the LAr Digital Processing system in the back-end to extract the transverse energies and perform the bunch-crossing identification. A demonstrator has been installed during Run-2, and the results of the data-taking have helped to validate the chosen technology. Results of ASIC developments including QA/QC and radiation hardness evaluations, performance of the pre-production boards, results of the system integration tests, QA/QC test of final production boards will be presented along with the overall system design and status of the installation and commissioning. Indico - Integrated Digital Conference Powered by Indic
Development of the ATLAS Liquid Argon Calorimeter Readout Electronics for the HL-LHC
To meet new TDAQ buffering requirements and withstand the high expected radiation doses at the high-luminosity LHC, the ATLAS Liquid Argon Calorimeter readout electronics will be upgraded. Developments of low-power preamplifiers and shapers to meet low noise and excellent linearity requirements are ongoing in 130nm CMOS technology. In order to digitize the analogue signals on two gains after shaping, a radiation-hard, low-power 40 MHz 14-bit ADCs is developed in 65 nm CMOS. The signals will be sent at 40 MHz to the off-detector electronics, where FPGAs connected through high-speed links will perform energy and time reconstruction through the application of corrections and digital filtering. The data-processing, control and timing functions will be realized by dedicated boards connected through ATCA crates. Results of tests of prototypes of front-end components will be presented, along with design studies on the performance of the off-detector readout system
ATLAS Liquid Argon Calorimeter Front-end electronics Phase-2 upgrade
The electronic readout chain is composed of four main components. 1: New front-end boards will allow to amplify, shape and digitise the calorimeter’s ionisation signal on two gains over a dynamic range of 16 bits and 11 bit precision. Low noise below Minimum Ionising Particle (MIP), i.e. below 120 nA for 45 ns peaking time, and maximum non-linearity of two per mille are required. Custom preamplifiers and shapers are being developed to meet these requirements using 65 nm and 130 nm CMOS technologies. They shall be stable under irradiation until 1.4kGy (TID) and 4.1x10^13 new/cm^2 (NIEL). Two concurrent preamp-shaper ASICs were developed and, “ALFE”, the best one has been chosen. The test results of the latest version of this ASIC will be presented. “COLUTA”, a new ADC chip is also being designed. A production test setup is being prepared and integration tests of the different components (including lpGBT links developed by CERN) on a 32-channels front-end board are ongoing, and results of this integration will be shown. 2: New calibration boards will allow the precise calibration of all 182468 channels of the calorimeter over a 16 bits dynamic range. A non-linearity of one per mille and non-uniformity between channels of 0.25% with a pulse rise time smaller than 1ns shall be achieved. In addition, the custom calibration ASICs shall be stable under irradiation with same levels as preamp-shaper and ADC chips. The HV SOI CMOS XFAB 180nm technology is used for the pulser ASIC, “CLAROC”, while the TSMC 130 nm technology is used for the DAC part, “LADOC”. The latest versions of those 2 ASICs which recently passed the production readiness review (PDR) with their respective performances will be presented. 3: New ATCA compliant signal processing boards (“LASP”) will receive the detector data at 40 MHz where FPGAs connected through lpGBT high-speed links will perform energy and time reconstruction. In total, the off-detector electronics receive 345 Tbps of data via 33000 links at 10 Gbps. For the first time, online machine learning techniques are considered to be used in these FPGAs. A subset of the original data is sent with low latency to the hardware trigger system, while the full data are buffered until the reception of trigger accept signals. The latest development status of the board as well as the firmware will be shown. 4: A new timing and control system, “LATS”, will synchronise to the aforementioned components. Its current design status will also be shown
ATLAS Liquid Argon Calorimeter Front-end electronics Phase-2 upgrade
A new era of hadron collisions will start around 2029 with the High-Luminosity LHC, which will allow to collect ten times more data than the amount that has been collected during the past 10 years of operation at LHC. This will be achieved by higher instantaneous luminosity, at the price of higher number of collisions per bunch crossing. In order to withstand the high expected radiation doses and the harsh data taking conditions, the ATLAS Liquid Argon Calorimeter readout electronics will be upgraded. The electronic readout chain is composed of four main consituents. New front-end boards and calibration boards will be installed on-detector, while, off-detector, signal processing boards and a new timing and control system will take care of the energy and time reconstruction and synchronization of the readout electronics respectively. The custom electronics in each subsystem will satisfy stringent requirements for both noise level and linearity, and, for the on-detector components, maintain functionality up to 1.4 kGy (TID) and 4.1 × 1013 /cm2 (NIEL). The current development status and the performances of both the on-detector and off-detector electronics will be presented
Development of the Trigger Readout System for the Phase-I Upgrade of the ATLAS Liquid Argon Calorimeters
The ATLAS Liquid Argon (LAr) Calorimeters were designed and built to measure electromagnetic and hadronic energy in proton-proton collisions produced at the LHC at centre-of-mass energies up to 14 TeV and at instantaneous luminosities up to 1034cm-2s-1. An LHC upgrade is planned to enhance the luminosities to 2-3 x 1034cm-2s-1 and to deliver an integrated luminosity of about 300 fb-1 during Run 3 from 2019 through 2021. In order to improve the identification performance for electrons, photons, taus, jets, missing energy at high background rejection rates, an improved spatial granularity of the trigger primitives has been proposed. Therefore, a new trigger readout system is being designed to digitize and process the signals with higher spatial granularity. A demonstrator system has been developed and installed on the ATLAS detector to evaluate the technical and performance aspects. Analog signal parameters including noise and cross-talk have been analyzed. The performance of the new demonstrator system in the data taking run will be presented. The next generation of prototypes for the trigger readout system is being developed. In this paper, research and development of radiation tolerant custom ASICs for the final trigger readout system will be discussed
Development of the ATLAS Liquid Argon Calorimeter Readout Electronics for the HL-LHC
Following new TDAQ buffering requirements and high expected radiation doses in the pileup conditions of the high-luminosity LHC, the ATLAS Liquid Argon Calorimeter electronics will be upgraded to readout the 182,500 calorimeter cells at 40 MHz with 16 bit dynamic range. The triangular calorimeter signals are amplified and shaped by the analogue electronics over a dynamic range of 16 bits, with low noise and excellent linearity. Developments of low-power preamplifiers and shapers to meet these requirements are ongoing in CMOS 130nm. In order to digitize the analogue signals on two gains after shaping, radiation-hard, low-power 40 MHz 14-bit ADCs are developed using a SAR architecture in 65 nm CMOS. Characterization of the first prototypes of the frontend components show good promise to fulfill all the requirements. The signals will be sent at 40MHz to the off-detector electronics, that will make use of FPGAs connected through high-speed links to perform energy and time reconstruction through the application of corrections and digital filtering. Reduced data are sent with low latency to the first level trigger, while the full data are buffered until the reception of trigger accept signals. The data-processing, control and timing functions will be realized by dedicated boards connected through ATCA crates. Results of tests of the first prototypes of front-end components will be presented, along with design studies on the performance of the off-detector readout system
ATLAS Liquid Argon Calorimeter readout electronics upgrades for the HL-LHC
The ATLAS Liquid Argon Calorimeter readout electronics will be upgraded for the HL-LHC. This includes the development of custom preamplifiers and shapers with low noise and excellent linearity, a new ADC chip with two gains, and new calibration boards with excellent non-linearity and non-uniformity between all calorimeter channels. New ATCA-compliant signal processing boards equipped with FPGAs and high-speed links receiving the detector data and performing energy and time reconstruction as well as a new timing and control system are also designed. Test results of the latest versions of the aforementioned components and the latest firmware development will be presented
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