1,721,119 research outputs found
VLSI Design of a Routing Switch for the SpaceWire Serial Link Standard
No full textModem satellite systems require the transfer of huge amount of data on board to the satellite. This is particularly critical for future, high-capability remote-sensing missions. To address this issue, the European Space Agency recently proposed a new serial data link standard, named Spacewire. In order to simplify the on board connectivity and to provide redundancy a network routing switch is needed. In this paper, we present the VLSI design of a routing switch compliant with the Spacewire standard Issue C. A 100 Mbps single-chip circuit has been developed for the ATMEL 0.5 μm CMOS radiation tolerant technology resulting in 115 Kgate complexity for a 100 MHz clock frequency
Radiation tolerant technology implementation of a SpaceWire routing switch
No full textModern satellite systems require the transfer of huge amount of data on board to the satellite. This is particularly critical for future, high-capability remote-sensing missions. To address this issue, the European Space Agency recently proposed a new serial data link standard, named SpaceWire. In order to simplify the on board connectivity and to provide redundancy a network routing switch is needed. In this paper, we present the VLSI design of a routing switch compliant with the SpaceWire standard (ECSS-E-50-12A). A 100 Mbps single-chip circuit has been developed for the ATMEL 0.5 m CMOS radiation tolerant technology resulting in 120 Kgates complexity for a 100 MHz clock frequency
Intellectual Property Macrocell for SpaceWire Interface Compliant with AMBA-APB Bus
No full textModern satellite systems require the transfer of huge amount of data on board to the satellite. This is particularly critical for future, high-capability remote-sensing missions. To address this issue, the European Space Agency proposed a new serial data link standard, named SpaceWire (ECSS-E-50-12A).
In order to simplify the development of complex System On Chip (SoC) featuring a SpaceWire interface for external communications it is of paramount importance the availability of a SpaceWire Interface Intellectual Property (IP) macrocell compliant with a system bus and developed according to a proper design and verification methodology.
In this paper we present the VLSI design of a SpaceWire interface for the AMBA APB bus, compliant with the SpaceWire standard and the AMBA 2.0 specifications. Particular attention has been devoted to the verification methodology in order to increase the reliability of the IP macrocell.
The SpaceWire interface for APB bus is composed by a SpaceWire Encoder-Decoder without buffers and a wrapper for a 32 bits APB bus containing the registers necessary to control the interface, the buffers and the logic to exploit the 32 bits width of the APB bus by transferring two 9 bits tokens in a single bus cycle.
The proposed verification methodology used in the development of the SpaceWire interface consists of 4 verification steps: block level, bus level, system level and prototype level.
The block-level simulation aims to verify the IP functionality when it is considered as stand alone. The checks are related to the reset condition, to the register read/write accesses and to the IP behaviour during exploitation of its functionality.
The bus-level simulation phase aims to guarantee the absence of conflicts between the IP and other peripherals. The checks are mainly related to the register read/write accesses.
The system-level simulation phase aims to verify the correct IP functionality once it is plugged on the whole SoC. The main difference with respect to the previous phases is that in this environment the processor is used to perform all operations needed to verify the IP.
Since we are currently applying this verification methodology also to the LEON platform, we have tested the SpaceWire IP within the same environment. Particularly, data transfer between two SpaceWire interfaces connected together have been verified by using the LEON CPU running a proper software routine.
The last step consists on prototype level verification, in which the whole system is synthesized and fitted on an FPGA board. To verify the system behaviour the same routines developed for the System level are run and relevant results compared with the System level ones.
The SpaceWire Interface design has been developed according to a design for reuse approach, based on VHDL which lead to a parametric (number of characters in the FIFO) and technology-independent description refined up to a register transfer level (RTL). The circuit has been characterized by means of logic synthesis for a 0.18 um CMOS standard-cell technology resulting in an overall 3.5 Kgates complexity (buffers excluded) and a maximum data rate of 100 Mbps
Going Beyond Counting First Authors in Author Co-citation Analysis
Full text linkThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Storage ring free electron lasers and saw-tooth instability
No full textWe show that Free Electron Lasers (FEL) operating with storage rings may counteract beam instabilities of the Saw Tooth (STI) type. We use a model based on a set of equations that couple those describing the FEL evolution to those accounting for the STI dynamics. The analysis provides a clear picture of the FEL-STI mutual feedback and clarifies the mechanisms of the instability inhibition. The reliability of the results is supported by a comparison with fully numerical codes. (C) 1999 Elsevier Science B.V. All rights reserved
Generic Sensor Interface for on-Board Satellite Applications
No full textSatellite demands in terms of computational power, dimensions, mass, reliability and power consumption related to the electronic circuitry for on-board-processing (both payload and house keeping operations) are typically addressed with integrated solutions: System-on-Chip (SoC) has become a familiar term which identifies a complex heterogeneous system composed by one or more processing units, an application specific block-set and a variable number of general purpose [programmable] peripherals (communication, networking, memories). New design methodologies are required for the design and verification of such a complex SoC in a reasonable time. In this paper we applied the so called platform based approach for the development of a generic digital sensor interface: the interface gathers the data coming from a space qualified sensor and after a proper signal conditioning (offset calibration, linearization, thermal compensation) provides the processed information through a SpaceWire link
Variations on the Author
Full text link“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Platform-Based Design for Space Applications
No full textThis paper presents a platform-based approach adopted to develop a sensor interface for a generic spacequalified sensor. The design environment is composed by hardware blocks and software tools suitable for the design space exploration, while a proper verification methodology intents to guarantee the correct system behavior and to increase its reliability. An application case with a rate gyro sensor is being considered in order to tune the design flow. The approach aims to reduce the costs of the final chip in terms of either the development time, by exploiting the platform concept, or the involved circuitry, for the massive usage of the digital electronic in spite of the analog one
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