165 research outputs found
A Single-Chip Optical Sensor with Analog Memory for Motion Detection
No full textA 64x64-pixel image sensor with full-frame analog memory and on-chip motion processor is presented. The processor consists of a charge amplifier and an analog subtractor. It uses the switched-capacitor technique and calculates the difference between the values of the signal on each pixel in successive frames. The rate can achieve up to 60 frames/s with limited area and power overhead. The analog memory required for the storage of the previous frame is implemented using implanted capacitors placed within the sensor array. Fabricated in a 1.2-um standard CMOS process with an added metal 3 light-schielding layer, the circuit is fully funcional and requires a total core area of 13mm
Hardware/Software Co-Design of Complex Embedded Systems: An Approach Using Efficient Process Models, Multiple Formalism Specification and Validation via Co-Simulation
No full textThis paper presents a hardware/software co-design approachwhere different specification languages can be used in parallel, allowingeffective system co-modeling. The proposed methodology introduces a processmodel that extends the traditional spiral model so as to reflect the designneeds of modern embedded systems. The methodology is supported by an advancedtoolset that allows co-modeling and co-simulation using SDL, Statecharts andMATRIXX, and interactive hardware/software partitioning. The effectivenessof the proposed approach is exhibited through two applicati on examples: thedesign of a car window lift mechanism, and the design of a MAC layer protocolfor wireless ATM networks
Estimating the design and development cost of electronic items
No full textThis thesis is concerned with understanding the issues in generating cost estimates at the conceptual design stage for Embedded Systems Design and Development (ES D&D), based on specifications. The research examines if there are any relationships between the system’s specifications and the system’s cost, and if these relationships can be formalised. The aim is to develop a framework that will structure, formalise and improve the ES D&D Cost Estimating process.
Literature review examines current situation regarding ES D&D Cost Estimating and the information requirements for generating cost estimates. The review identifies that research concentrates on Embedded Systems manufacturing cost estimation, there is a lack of research regarding D&D cost estimation, as well as on the information requirements for generating D&D cost estimates.
By conducting an industrial survey, the author identifies the internal practice on ES D&D Cost Estimating for the automotive and aerospace industries and identifies trends, commonalties and differences within and between them. The survey establishes that in order to improve the ES D&D Cost Estimating process, it is essential to establish a data infrastructure that will avoid issues with shortage of information imposed by suppliers and will link the Embedded System’s specifications with the system’s actual implementation and expected functionality.
Using a case study approach, the author also establishes that it is essential to analyse the product functionality in such a way that will enable the development of a detailed cost estimating framework at the specification’s design stage. The framework is developed in three parts for hardware, software and integration and reuse. The ES hardware design and development effort is predicted using a complexity based cost estimating approach. The research has demonstrated that Use Case Points can be used to predict software development effort for ES software development when the specification is expressed as use cases. In case of statechart based specifications, the development effort is predicted, like in the case of Hardware, using a complexity based cost estimating approach. The study then investigates factors that affect Integration and Reuse effort for ES D&D. The Integration and Reuse effort is predicted using a expert judgement based methodology.
The developed results provide automotive industry with a structured, consistent approach to develop cost estimates for the ES D&D Cost at the specifications design stage. The approach contributes towards improvement of the cost estimating practice within the automotive industry
Electronic distortion compensation in the mitigation of optical transmission impairments: the view of joint project on mitigation of optical transmission impairments by electronic means ePhoton/One+ project
No full textA mapping algorithm for computer-assisted exploration in the design of embedded systems
No full textWe present a technique for automatic exploration of architectural alternatives in the design of complex electronic embedded systems and systems-on-a-chip. The technique transforms the problem into a set of simple model-to-model operations and a mapping algorithm that becomes the core of the entire design process. The mapping algorithm is formulated as an assignment-type problem (ATP), which is, in turn, solved by a straightforward optimization method. The result is a design assistance tool, which is demonstrated through a telecommunication systems example.</jats:p
A digitally configurable reference capacitance with mismatch compensation for biosensor readout circuits
No full text
Ανάπτυξη συστήματος καταγραφής ίχνους (GPS Logger) με χρήση πλατφόρμας υλικού ανοικτού κώδικα "Arduino"
No full textΠεριέχει βιβλιογραφικές παραπομπές.Η εργασία αφορά τη σχεδίαση, συναρμολόγηση υλικού (hardware) και την ανάπτυξη
εφαρμογής λογισμικού, για την καταγραφή ίχνους με χρήση gps, πάνω από την
πλατφόρμα υλικού ανοικτού κώδικα "arduino". Η συγκεκριμένη πλατφόρμα είναι μια
ανοικτή πλατφόρμα υλικού, για την οποία διατίθεται ένα περιβάλλον ανάπτυξης
εφαρμογών σε γλώσσα υψηλού επιπέδου, καθώς και πλήθος από στοιχεία υλικού
(hardware), όπως αισθητήρες, δικτυακές διεπαφές, κ.ά., τα οποία διατάσσονται
κατάλληλα ώστε να επιτελούν μια ή περισσότερες λειτουργίες.
Στο πλαίσιο της εργασίας υλοποιήθηκε η προδιαγραφή, η σχεδίαση και η ανάπτυξη
ολοκληρωμένου συστήματος υλικού και λογισμικού (η ανάπτυξη υλικού αφορά
σύνδεση των απαραίτητων modules υλικού πάνω στην πλατφόρμα arduino) για την
καταγραφή ίχνους κινούμενου οχήματος ή πεζού, με χρήση της τεχνολογίας GPS.
Είναι χαρακτηριστικό ότι μολονότι η συγκεκριμένη πλατφόρμα γίνεται ολοένα και πιο
δημοφιλής, η τεκμηρίωση του λογισμικού της συσκευής (π.χ. βιβλιοθήκες που
υποστηρίζουν κάποιο στοιχείο υλικού και εφαρμογές που συνδέουν τέτοιες βιβλιοθήκες
με εξειδικευμένο λογισμικό) με βάση τους προτεινόμενους από την Τεχνολογία
Λογισμικού τρόπους, είναι πολύ περιορισμένη.
Στην εργασία αυτή επιχειρήθηκε μια συνθετική δουλειά που θεματικά εκτείνεται σε
μεγάλο εύρος των γνωστικών αντικειμένων του προγράμματος σπουδών συνθέτοντας
και αξιοποιώντας γνώσεις που αποκτήθηκαν σε αυτό, για να κατασκευάσει μια νέα
συσκευή με το ανάλογο λογισμικό. Η συσκευή που κατασκευάστηκε αποτελεί μια
ιδιαίτερα οικονομική εναλλακτική πρόταση σε σύγκριση με υπάρχουσες λύσεις, για
συγκεκριμένες εφαρμογές, με σημαντικές δυνατότητες προσαρμογής στο επίπεδο του
υλικού και λογισμικού.This work focuses on the design, assembly of hardware and the development of
application software, for the recording of tracks using gps technology, over the platform
of open source hardware “arduino”, which is widely used for prototyping. This
particular platform is an open hardware platform, supported by a high-level software
development environment, as well as by a wealth of hardware elements such as sensors,
network interfaces, etc, which are available in the market and can be deployed in a
suitable way to perform one or more desired operations.
In this work the tasks of specification, design, and implementation of an integrated
system consisting of arduino-based hardware and software, have been undertaken. The
hardware implementation involved high-level design and assembly of readily-available
hardware elements around an arduino platform. On top of this, a software application
for recording tracks of pedestrians or vehicles on the move using gps technology has
been implemented.
Although this particular hardware platform becomes more popular, especially as a
prototyping platform, the documentation of application software (eg. libraries that
support specific hardware modules and applications required to interconnect such
libraries with specialized software modules) is relatively poor and usually not compliant
to the Software Engineering principles.
In this context a synthetic work has been undertaken, that is thematically extended to a
wide area of this post-grad program, by putting together knowledge acquired in
different modules to create a working hardware prototype of a new data logger device,
along with the corresponding software. The prototype device that has been developed is
a particularly economic alternative compared to existing similar devices, especially
considering the wide customization options both in software and hardware
An Adaptive Downsampling FPGA-Based TDC Implementation for Time Measurement Improvement
No full textIn this work, we present a compact “adaptive downsampling” method that mitigates the nonlinearity problems associated with FPGA-based TDCs that utilize delay lines. Additionally, this generic method allows for trade-offs between resolution, linearity, and resource utilization. Since nonlinearity is one of the predominant issues regarding delay lines in FPGA-based TDCs, combined with the fact that delay lines are utilized for a wide range of TDC architectures (not limited to the delay-line TDC), other implementations (e.g., Vernier or wave union TDCs), also in different FPGA devices, can directly benefit from the proposed adaptive method, with no need for either custom routing or complex tuning of the converter. Furthermore, implementation-related challenges regarding clock skew, measurement uncertainty, and the placement of the TDC are discussed and we also propose an experimental setup that utilizes only FPGA resources in order to characterize the converter. Although the TDC in this work was implemented in a Xilinx Virtex-6 device and was characterized under different operational modes, we successfully optimized the converter’s nonlinearity and resource utilization while retaining single-shot precision. The best performing (in terms of linearity) implementation reached DNLrms and INLrms values of 0.30 LSB and 0.45 LSB, respectively, and the single-shot precision (σ) was 9.0 ps
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