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Gigahertz Current Measurement for Wide Band-gap Devices
In order to improve efficiency and reduce circuit size the switching speeds of semiconductor power devices are being reduced. This is being achieved by the use of wide band-gap semiconductor devices. Traditional current measurement techniques are unable to accurately measure these new high speed switching edges, due to a lack of bandwidth and high insertion inductance. In this paper a 1.6 GHz bandwidth, scalable current, SMD shunt based current probe is developed for switching and steady state current measurements in wide band-gap power devices. By designing this shunt with an extremely low insertion inductance of less than 10 pH it is ensured that the measurement circuit has negligible impact on switching device operation
Low-Temperature Fully Photolithographic In-Si-O Thin-Film Transistors
This paper analyses the reliability of In-Si-O (ISO) thin-film transistors (TFT) via bias-stress and photo-stress measurements. The ISO TFTs used in the measurements were developed with a fully photolithographic process, with a maximum temperature of 200 □. Typical performance of ISO TFTs included a mobility of 5.03 cm2/(V·s), a threshold voltage (Vth) of-0.16 V, and a subthreshold swing of 312 mV/dec. In this work, ISO TFTs were biased up to four hours at different temperatures and illumination. Threshold voltage shifts were observed and modeled. Threshold voltage shifted towards the negative, and off-current and subthreshold swings increased when the TFT was exposed to light with wavelengths less than 660 nm. Further investigation indicated that these phenomena were caused by persistent photo-conductivity. This could be compensated for by using a positive gate pulse to remove the light-induced shallow doubly-ionized donor states
An openbim approach to iot integration with incomplete as-built data
Digital Twins (DT) are powerful tools to support asset managers in the operation and maintenance of cognitive buildings. Building Information Models (BIM) are critical for Asset Management (AM), especially when used in conjunction with Internet of Things (IoT) and other asset data collected throughout a building’s lifecycle. However, information contained within BIM models is usually outdated, inaccurate, and incomplete as a result of unclear geometric and semantic data modelling procedures during the building life cycle. The aim of this paper is to develop an openBIM methodology to support dynamic AM applications with limited as-built information availability. The workflow is based on the use of the IfcSharedFacilitiesElements schema for processing the geometric and semantic information of both existing and newly created Industry Foundation Classes (IFC) objects, supporting real-time data integration. The methodology is validated using the West Cambridge DT Research Facility data, demonstrating good potential in supporting an asset anomaly detection application. The proposed workflow increases the automation of the digital AM processes, thanks to the adoption of BIM-IoT integration tools and methods within the context of the development of a building DT
Enhanced piezoelectricity and electromechanical efficiency in semiconducting GaN due to nanoscale porosity
Electrical polarization phenomena in GaN are important as they have significant impact on the operation of modern day energy efficient lighting and are fundamental to GaN-based high power and high frequency electronics. Controlling polarization is beneficial for the optimization of these applications. GaN is also piezoelectric, and therefore mechanical stress and strain are possible handles to control its polarization. Nonetheless, polar semiconductors in general, and GaN in particular, are weak piezoelectric materials when compared to ceramics, and are therefore not considered for characteristic electromechanical applications such as sensing, actuation and mechanical energy harvesting. Here, we examine the effect of nanoscale porosity on the piezoelectricity of initially conductive GaN. We find that for 40% porosity, the previously conductive GaN layer becomes depleted, and exhibits enhanced piezoelectricity as measured using piezoresponse force microscopy, as well as by using a mechanical energy harvesting setup. The effective piezoelectric charge coefficient of the porous GaN, d33,eff, is found to be about 8 pm/V which is 2-3 times larger than bulk GaN. A macroscale device comprising a porous GaN layer delivered 100 nW/cm2 across a resistive load under a 150 kPa mechanical excitation. We performed finite element simulations to analyze the evolution of the piezoelectric properties with porosity. The simulations suggest that increased mechanical compliance due to porosity gives rise to the observed enhanced piezoelectricity in GaN. Furthermore, the simulations show that for stress-based excitations, the porous GaN electromechanical figure of merit is increased by an order of magnitude and becomes comparable to that of barium titanate piezoceramics. In addition, considering the central role played by GaN in modern electronics and optoelectronics, our study validates a very promising research direction when considering stress-based electromechanical applications which combine GaN's semiconducting and piezoelectric properties
A comprehensive methodology to determine optimal coherence interfaces for many-Accelerator SoCs
Modern systems-on-chip (SoCs) include not only general-purpose CPUs but also specialized hardware accelerators. Typically, there are three coherence model choices to integrate an accelerator with the memory hierarchy: no coherence, coherent with the last-level cache (LLC), and private cache based full coherence. However, there has been very limited research on finding which coherence models are optimal for the accelerators of a complex many-Accelerator SoC. This paper focuses on determining a cost-Aware coherence interface for an SoC and its target application: find the best coherence models for the accelerators that optimize their power and performance, considering both workload characteristics and system-level contention. A novel comprehensive methodology is proposed that uses Bayesian optimization to efficiently find the cost-Aware coherence interfaces for SoCs that are modeled using the gem5-Aladdin architectural simulator. For a complete analysis, gem5-Aladdin is extended to support LLC coherence in addition to already-supported no coherence and full coherence. For a heterogeneous SoC targeting applications with varying amount of accelerator-level parallelism, the proposed framework rapidly finds cost-Aware coherence interfaces that show significant performance and power benefits over the other commonly-used coherence interfaces
Enablers and barriers for industrial symbiosis: lessons learnt from twenty-five case studies
Successful implementation of industrial symbiosis is highly complex and occurs across multiple dimensions, both internal and external to the firm. We interrogated twenty-five case studies to build a rich picture of the various approaches that have been adopted to foster resource synergies between organisations. In this chapter, we present a set of critical success factors which we categorised as enablers and barriers in regard to the implementation of industrial symbiosis. The lessons learnt illuminate the processes of consideration, facilitation and scale up of industrial symbiosis
Study of MILD combustion using LES and advanced analysis tools
© 2020 The Combustion Institute. A cylindrical confined combustor operating under MILD condition is investigated using LES. The combustion and its interaction with turbulence are modeled using two reactor based models, PaSR and EDC. Results show that the Partially Stirred Reactor (PaSR) model yields improved estimation for mean temperature and species mole fractions compared to Eddy Dissipation Concept (EDC). LES data are analysed using advanced post-processing methods such as the chemical Tangential Stretching Rate (TSR), balance analysis and local Principle Component (PCA) analysis. TSR can identify chemical explosive (ignition-like) and contractive (burnt) regions. With the balance analysis of the convective, diffusive and reactive terms in temperature equation, regions with substantial heat release coming from ignition or flame are identified. The local PCA analysis classifies the whole domain into clusters (regions with specific features) and provides the leading species in each cluster. The three analyses correlate well with one another and it is observed that the most chemically active region locates upstream (in the near-field). Also, both autoignition and flame-like structures play equally important roles in MILD combustion
Integrated wafer scale growth of single crystal metal films and high quality graphene
We report on an approach to bring together single crystal metal catalyst preparation and graphene growth in a combined process flow using a standard cold-wall chemical vapor deposition (CVD) reactor. We employ a sandwich arrangement between a commercial polycrystalline Cu foil and c-plane sapphire wafer and show that close-spaced vacuum sublimation across the confined gap can result in an epitaxial, single-crystal Cu(111) film at high growth rate. The arrangement is scalable (we demonstrate 2″ wafer scale) and suppresses reactor contamination with Cu. While starting with an impure Cu foil, the freshly prepared Cu film is of high purity as measured by time-of-flight secondary ion mass spectrometry. We seamlessly connect the initial metallization with subsequent graphene growth via the introduction of hydrogen and gaseous carbon precursors, thereby eliminating contamination due to substrate transfer and common lengthy catalyst pretreatments. We show that the sandwich approach also enables for a Cu surface with nanometer scale roughness during graphene growth and thus results in high quality graphene similar to previously demonstrated Cu enclosure approaches. We systematically explore the parameter space and discuss the opportunities, including subsequent dry transfer, generality, and versatility of our approach particularly regarding the cost-efficient preparation of different single crystal film orientations and expansion to other material systems
Analytical Guidelines for Designing Curvature-Induced Dielectrophoretic Particle Manipulation Systems.
Curvature-induced dielectrophoresis (C-iDEP) is an established method of applying electrical energy gradients across curved microchannels to obtain a label-free manipulation of particles and cells. This method offers several advantages over the other DEP-based methods, such as increased chip area utilisation, simple fabrication, reduced susceptibility to Joule heating and reduced risk of electrolysis in the active region. Although C-iDEP systems have been extensively demonstrated to achieve focusing and separation of particles, a detailed mathematical analysis of the particle dynamics has not been reported yet. This work computationally confirms a fully analytical dimensionless study of the electric field-induced particle motion inside a circular arc microchannel, the simplest design of a C-iDEP system. Specifically, the analysis reveals that the design of a circular arc microchannel geometry for manipulating particles using an applied voltage is fully determined by three dimensionless parameters. Simple equations are established and numerically confirmed to predict the mutual relationships of the parameters for a comprehensive range of their practically relevant values, while ensuring design for safety. This work aims to serve as a starting point for microfluidics engineers and researchers to have a simple calculator-based guideline to develop C-iDEP particle manipulation systems specific to their applications