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具物件感知之即時非線性縮放;Design of Real-Time Object-Aware Non-Linear Scaling
No full text[[abstract]]由於面板技術的進步，使得顯示器的面板大小與形狀更顯多元，小至行動裝置大至電視等，進而使得影像縮放的技術備受重視。由於影像來源尺寸各式各樣，在輸出至終端機顯示時，必需縮放影像的尺寸大小來符合顯示器輸出規格，以往傳統的方式是用等比例的縮放，像是縮放(scaling)或是剪裁(cropping)，但是單純的縮放(scaling)容易造成畫面的失真或是變形，而剪裁(cropping)會造成黑邊或是資料流失的問題。因此近年來，興起基於影像的內容去做縮放，基於目的不同處理的方式也有很多種，而我們的訴求在於影像中的重要物件不會因為解析度的轉換而有長寬比例上的變形，並且減少整體畫面失真。 本論文所提之方法，以硬體達成所謂之目標，將演算法硬體化，使我們的能即時處理，也因此我們必需思考適合硬體實現的演算法，並且在不使用frame buffer條件下做處理，來達到降低硬體的成本與面積。相較於過往找尋重要物件的方法，我們減少找尋重要物體的計算量，經由邊緣偵測找尋可能之重要物件，且為了減少運算量，我們把圖片從像素層級轉成區域層級，並使用相連元件標籤，找出我們所包含重要物體的重要區域，來適合硬體化的實現。處理的方面我們盡可能地在保持整張圖的完整性條件下，將重要物體的長寬做等比例縮放，且對其餘的非重要區域使用不同的縮放比例來配合重要區域，來達到目的之影像大小。
With the progress of panel technology, there are diversities in shape and size of monitor panels ranging from small as mobile device to large as television. Furthermore, the image scaling technology also draws growing attention because of this progress. On account of the diversity of image sources, scaling image to fit the monitor output specifications is necessary. Traditional method is equal ratio scaling, including scaling and cropping. However, overall scaling causes image distortion or deformation; cropping results in problems of black border or data loss. Therefore, in recent years, a new upsurge of information-based scaling is growing; changeable methods result from different goals. The main purpose is that the vital objects in the image won’t be ratio distorted because of the change of resolution. The approaches mentioned in this paper will focus specifically on hardware-based algorithm, which can timely dispose of In order to cost down and downsize the hardware, we have to come up with an algorithm which can be run by the hardware without using frame buffer. Compare to the traditional process of searching the main objects in the image, we pay attention to hardware and spend less computation cost by using edge detection to target the main objects; converting images from pixel level to regional level; using connected component labels to mark out the important regions of the images. Whiling reading the images, we try to keep the integrity. By ratio-scaling the main objects and using different ratio on the rest of the trivial regions, we can bring out the theme of the images to attend our goal
基於FPGA單晶片及模糊語意影像特徵表示法 之車內人臉辨識;Driver’s Face Recognition Using FPGA Chip and Semantics-based Vague Image Representation
No full text[[abstract]]在環境智能(Ambient Intelligence)的系統發展裡，人臉辨識是身分驗證之重要技術之一，在許多重要的公共場合及居家環境，此技術都可以被用來當作人員及安全掌控的重要工具。而反觀在智慧型運輸系統(Intelligent Transport System, ITS)上面，此類系統卻還尚未普及。其主要原因是車內空間有限，所以搭載的處理器運算能力往往無法達到複雜之快速人臉辨識運算。因此，本研究特地針對汽車，開發一套基於單晶片設計之快速人臉辨識系統，並且達到低功耗、低開發成本之效益。在此研究裡，本人首先利用一小型數位相機，對駕駛人臉進行擷取，接著以單一現場可程式邏輯閘陣列(Field Programmable Gate Array, FPGA)晶片，以硬體電路設計架構實現快速影像辨識功能。而為了要達到最少之晶片邏輯閘使用量而又同時兼顧高速處理能力，本研究還特地採用了修正型之模糊語意影像特徵表示法(Semantic-based Vague Image Representation, SVIR)來完成人臉特徵之表達及擷取。此特徵擷取演算法特色在於不需要複雜之幾何、矩陣公式、及三角函數，就能夠快速的對物體外型以語意的方式進行有效率的描述，並有利於後續人臉特徵之分類，因此特別適用於小型崁入式系統(Embedded sysytem)設計當中。根據本研究的實驗結果，車主的辨識率大多落在87%-93%之間，並且能與陌生對象的辨識率有明顯的差距存在。此外，當本研究將人臉辨識之門檻值設為85%時，可以使得本研究擁有最低的辨識錯誤率，以達到人臉辨識之可靠度之需求。而本系統之設計亦可運用在智慧型居家的門禁系統以及智慧型手機的解鎖系統上。
The face recognition technology is an important technology for identification in the Ambient Intelligence systems. Such technology can be employed in public occasions and smart homes. However, for the intelligent Transport System (ITS), it is still not popular due to the limited interior space of car, which leads to a weak computing system. Therefore the goal of this project is to develop a real-time face recognition based on single-chip design for the vehicle, and it will achieve low-power consumption and low-cost production. In this project, this study firist uses a digital camera to extract driver’s face and then uses Field Programmable Gate Array (FPGA) to implement image recognition in real-time. To achieve a minimum usage of logic element and high-speed processing capability, this research particularly adopts the algorithm of Semantic-based Vague Image Representation (SVIR) to perform the representation and extraction of facial features. The characteristic of this feature extraction algorithm is that can efficiently describe object’s contour by semantics and does not need to employ complicated geometry, matrices, and trigonometric funtions. Thus it is useful for facial classification, particularly suitable for miniature embedded system. Finally, according to the experimental results of this project, the similarity rate of faces are mostly among 87% and 93%, which distinguishes from strangers. In addition, when the similarity threshold of face recognition is set for 85%, it can make the system achieves the lowest recognition error rate and meets the reliability requirement of face recognition. The design of the system is promising and can also be used in intelligent home access control systems and smart phone unlock system in the future
基於FPGA的卷積神經網絡硬體設計;Convolutional Neural Networks Hardware Design Based on FPGA
No full text[[abstract]]近幾年深度學習(Deep learning)開始廣泛利用在許多地方，例如電腦視覺、語音辨識、音訊辨識、影像處理、生物資訊學等。深度學習至今已有數種學習方式，例如深度神經網絡(DNN)、卷積神經網絡(CNN)、遞迴神經網絡(RNN)等。與其他相比，CNN在圖像文字辨識上能夠有更優秀的結果。雖然CNN有著更優秀的結果，可是因為運算過程的資料量過大，以及其網絡結構複雜，使得CNN的FPGA硬體實作頗為困難許多。因此本論文提出以下幾點貢獻，首先，提出一個優化的卷積神經網絡架構，重複利用卷積神經網絡計算層，以減少硬體資源 ; 除此之外，並使用分塊方法(tiling)，減少I/O的暫存器空間 ; 還有基於電路內部記憶元件數量的限制，減少了運算中暫存器儲存數量，且利用同時運算進而降低整體運算時間 ; 最後，亦利用分塊方式將CNN最後一級的SVM核心成功在硬體上實現。本論文使用ZedBoard Zynq-7000 EPP XC7Z020-CLG484-1。
In recent years, Deep Learning has been widely applied to fields like computer vision、automatic speech recognition、audio recognition、image processing and bioinformatics. There are several deep learning architectures, such as the Deep Neural Network(DNN), the Convolutional Neural Networks(CNN), and the Recurrent Neural Networks (RNN), etc. Compared to others, the CNN has better results in the fileds of image and text recognition. However, due to the huge amount of data required during processing and the complexity of the network structure, it has been a challenging task to realize CNN in hardware.In this thesis, we propose optimization schemes to fit the CNN into FPGA hardware. Firstly, an optimized CNN architecture is proposed that reuses the computing layer in order to reduce the hardware resource. In addition, tiling is employed to decrease the amount of I/O registers. Also, by taking the internal memory constraints, we further reduce the number of registers during computation. We also reduce the overall computation time by using simultaneous operations. Finally, the SVM training, which is the last kernel operation in CNN, is also realized via tiling.We used ZedBoard Zynq-7000 EPP XC7Z020-CLG484-1 in this paper
微型化雙頻帶通濾波器設計與四工器應用於無線擴音模組;Design of the Compact Microstrip Dual-Band Bandpass Filters and Quadruplexer for Wireless Microphone System
No full text[[abstract]]本論文分為兩個部分，第一部分為微型化雙頻帶通濾波器設計，是結合傳輸線、耦合線以及接地電桿的方式，設計出微型化雙頻帶通濾波器。此電路具有尺寸極小、隔離度好以及選擇性高等優點，可進而提升雙頻帶通濾波器特性。 第二部分介紹四工器應用於無線擴音模組，使用四組帶通濾波器作為基本單位架構來設計四工器，其基本單位架構包含分佈式耦合饋入線、分佈式耦合輸出線與一對C型諧振腔，然後把四工器應用於含有四個頻段的無線擴音模組系統之中。上述兩個電路設計，使用電磁模擬軟體IE3D進行模擬輔助，以及實際製作電路進行量測。經由電磁模擬與量測的結果比較，兩者具有良好的一致性。
The thesis contains two parts. The first part will introduce a design of compact dual-band bandpass filters ,which combine the transmission lines, parallel coupled lines and grounded inductor are integrated to design a compact dual-band bandpass filters. The proposed circuit has compact size, high isolation, and high selectivity….etc. of benefits to improve the performance of dual-band bandpass filters. The second part will introduce a quadruplexer for wireless microphone system.We use four band pass filters as unit cells and put those four cells together to design a quadruplexer for wireless microphone system. The unit cell contains distributed coupling feed line, distributed input/output lines and a pair of C-shaped resonators.We eventually put quadruplexers into wireless microphone system for application. These two circuits are simulated with electromagnetic simulator software IE3D, and the prototype of these two circuits are fabricated and measured. Comparing the simulated results with the experimental data, we can see that the measured results can match well with the EM simulation
應用於微創手術之精準定位雷達暨相位殘段累增演算法;Precise Radar Positioning with Phase Segmentation Accumulating Algorithm Designed for Minimally Invasive Surgery
No full text[[abstract]]本論文提出應用於微創手術之器械定位技術，利用一頻率調變雷達系統電路與新式演算法來實現目標物毫米級定位準度。研究核心著重於殘段相位累積演算理論的推算，並以此創新理論解決於傳統頻率調變理論中，距離解析度受到系統頻寬的限制；而另一方面，為達到在空間中多重目標的定位，因此將殘段相位累增法與BPSK調變機制結合，進行數學理論分析，以得知解析訊號的數學特性。系統電路採用為24 – 24.4 GHz 可程式化毫米波收發機模組與頻率調變鎖相迴路，藉由SPI對模組晶片進行溝通動作，並在系統架構上額外掛載一功率放大器，以提升訊號的強度與偵測距離；整體雷達系統電路經過整合量測後，將目標物分別設定為金屬平板與BPSK調變標籤電路以進行一維座標距離量測，程式介面與後端訊號處理乃利用NI-LabVIEW圖形化控制介面進行開發，並編寫訊號擷取與數位訊號處理等程式流程，以對距離量測之數據進行後續討論與解析。最終量測結果可突破於傳統理論中，400 MHz頻寬範圍解析度為18.75 cm之限制，將定位精度大幅提升至17.3 μm。
The radar-based positioning technology designed for the minimally invasive surgical instrument guiding is presented in this thesis. It is designed using the frequency modulation continuous wave radar system with a newly proposed algorithm to achieve the mm-scale positioning accuracy. According to the traditional FMCW radar theory, the range resoulation is limited by frequency sweeping bandwidth. This study focuses on a new theory of phase segmentation accumulation to overcome this issue. In order to achieve multi-target positioning, the binary phase shift keying (BPSK) is applied in tag modulation. Further mahthematical analysis of BPSK is also given in this work. The proposed radar system consists of a commercial 24 GHz programmable millimeter wave transceiver module and a frequency modulation PLL module, An extrenalit power amplifier is added to increase the signal power as well as the detecting range. The signal acquisition and signal processing is performed using NI – LabVIEW. In the experimental demonstrations, both metal plane and BPSK tag are employed as the targets. The results show that the range resoulation can be dramatically improved from 18.75 cm (limited by to 400MHz sweeping bandwidth) to 17.3 μm
平行化防碰撞偵測之晶片設計與實作;Design and Implementation of ASIC for Parallelizing Collision Detection
No full text[[abstract]]隨著科技不斷進步，防碰撞系統日漸重要，機械手臂、虛擬實境、自動駕駛等運用自動化與智慧化的技術，都會運用到防碰撞偵測系統，由於在三維空間中，構築物件的精密性越高，需求的運算量也越大，在現今需要即時判斷物件是否會碰撞的環境下，碰撞偵測仍是一項挑戰。 本篇論文以分離軸定理為基礎，實現於積體電路上。由於分離軸定理在檢測碰撞的運算時間會因為需要計算的分離軸數量而影響測試時間，在最佳的情況時，只需要計算1條分離軸，而最差的情況，需要計算完11條分離軸才能得知兩物件是否發生碰撞。因此藉由平行化將分離軸定理的運算時間規則化，並將整體架構進行平行化，進而加速整體防碰撞系統的運算速度，以達到每毫秒能測試完兩物件是否碰撞的即時防碰撞偵測系統。
With the development of science and technology,automatic anti-collision system becomes more significant. Including robotic arm, virtual reality, self-driving vehicles and etc. Such as the use of automated and intelligent technology, will be applied to the anti-collision detection system. As in the three-dimensional space, The higher the precision of the building object, the greater the amount of demand for computing. Today need to judge in real time Collision, anti-collision detection is still a challenge. This theses is based on separation axis theorem and is realized on the integrated circuit. The separation axis theorem in the detection of the collision time will be unstable. In the best case, only one separation axis needs to be calculated, And the worst case, need to calculate the 11 separation axis to know whether the two objects collide. so the computing time of the separation axis theorem is regularized by the parallelization. And the overall structure of parallel, thus accelerate computing speed. In order to achieve every millisecond to test whether the two objects crash collision anti-collision detection system
手持式超音波系統之發射器穩壓脈波調變與高精度相位調整接收器模組設計;PWM Controller of a Transmitter and High-Precision Phase Adjustment of a Receiver for a Portable Ultrasound System
No full text[[abstract]]現今超音波領域的發展越來越盛興，掃描儀相關產品的需求量也跟著增加，且越來越多產品已經轉往手持式系統發展，因此在超音波系統內部的發射器與接收器也以減少晶片佈局面積、功率消耗、增加穩定性與準確度為持續去改善之目標，發射器方面Power Supply是由DC-DC Converter轉換提供，電壓轉換過程的穩定性是一大考量，確保發射之訊號準確度；接收器之傳輸介面又以低電壓差動訊號傳輸應用廣泛，具備有高速、低功率消耗、高抗雜訊優等優點。本論文提出一組電壓模式控制之穩壓脈波調變(PWM Controller)控制電路，其原理是由直流至直流轉換輸出之電壓經過回授分壓，由誤差放大器偵測回授分壓與參考電壓之壓差並輸出一組參考準位電壓，最後由另一組比較器輸入參考準位與一週期固定之振盪鋸齒波去比較，以控制脈波之Duty Cycle，調節電壓轉換穩定性，另一方面也將正、負壓源之回授輸入整合至同一顆晶片內部，以方便與Pulser系統電源做整合，此設計是採用世界先進 VIS 0.5μm 高壓製程進行電路設計與模擬，Open-Loop Gain為83dB，負電壓(0~-5V)轉正電壓(0~5V)功能正常；低電壓差動訊號接收器方面，本文提出了改良式的延遲相位調整器，將單為延遲級數擴充成32級，由我們所設計的32組二對一多工器去做高、低頻操作的切換，來增加其每一級單位延遲的精準度，及整體的延遲時間，並以『隔離』、『閘控』與『減少switch activities』的概念來減少功率消耗，整體的佈局為280x76.2μm^2，單為延遲精度為0.268ns，功率消秏為1.18mW，以此為架構整合至低電壓差動系統中，並完成低電壓差動訊號十六通道接收器之電路，消耗功率為520mW；此設計採(CIC)所提供的台積電 TSMC 0.18μm 1P6M CMOS 標準製程進行電路設計模擬，以上模擬結果驗證功能皆正確無誤，八通道部分已下線成功。
Nowadays, the development of the ultrasound field has become more and more flourishing, and the demand increased for scanner-related products, There are more and more products has been transferred to portable systems. Therefore, in the ultrasonic system, there has several improved points, reducing the chip layout area, power consumption, increasing stability and accuracy for the goal of the transmitter and receiver, the transmitter side of the power supply is provided by the DC-DC converter to convert, the stability of the voltage conversion process is a major consideration to ensure that signal accuracy; On the receiver side, the low-voltage differential signal (LVDS) transmission widely used for transmission interface, It has several advantages, like high-speed, low power consumption, and the best anti-noise capability.In this paper, We purpose a voltage mode control of PWM Controller for voltage regulating , the principle is coming from DC to DC conversion output voltage through the feedback voltage, Then using the error amplifier to detect the feedback voltage and bandgap reference voltage difference between the voltage and output a reference level voltage, finally we use the other comparator, using reference level voltage as input to positive side and a fixed cycle oscillation sawtooth wave as input to negative side, by comparing both inputs to control the Duty Cycle width for adjust the stability of voltage conversion, In addition, the positive and negative voltage source feedback into the same chip to facilitate the integration with the pulser system of ultrasound, The purposed PWM controller has been fabricated by VIS 0.5μm high-voltage process for circuit design and simulation, Open-Loop Gain is 83dB, FBN(0~-5V) to transform FBP(0~5V) function is correct;On the other hand , We purpose a modified delay phase adjuster of low-voltage differential signal (LVDS) receiver, the single delay cell expansion into 32 step, we use 32 groups 2 to 1-multiplexer to select high or low frequency operation switch for increasing the accuracy of unit delay on each cell, and the overall maximum delay time, by "isolation", "gate control" and "reducing switch activities" concept to reduce the power consumption, the overall layout area is 280x76.2?μm?^2, delay cell precision is 0.268ns, and power consumption is 1.18mW, as the structure into the low-voltage differential system, and achieve the low-voltage differential signal 16 channel receiver circuit; The proposed has been fabricated by TSMC 0.18μm 1P6M CMOS standard process provided by (CIC) for circuit design and simulation. The simulation verify its function work, and eight-channel part has been successfully tape out
振盪器陣列藉由浮動接地網路之同步與相位調控機制探討;Investigation of Synchronization and Phase Tuning in Oscillator Array with Wavy Ground Network
No full text[[abstract]]此論文研究新型態之耦合架構，以簡單之共地耦合路徑與地端電感將參考地與大地分開，使電壓訊號於電感性的平台之上做波動，形成浮動接地網路，再藉由此耦合網路之特性，達成振盪器相互鎖定與調控電壓控制相位之機制，然後形成每路天線所需相位，產生波束成形之效果。 起初以理論與模擬，觀察浮動接地網路實現的可能性與特性，整理出在浮動接地網路上，兩振盪器之間距將影響其起始相位狀態，一種為同相位同步(In-Phase)，另一種為反相位同步(Anti-Phase)。 電路以同相位同步作為浮動接地網路上振盪器間距設計之原則，並驗證1×2浮動接地振盪器是否能達到相互鎖定與相位調控，量測結果為-67.5° ~ 74.6° (@ 2.3 GHz)及-73° ~ 72° (@ 1.6 GHz)，輸出功率皆為10 dBm，輸出功耗皆為2 × 5V × 21 mA = 210 mW，有達到相互鎖定與相位調控之特性。 為延伸相位調控之功能，利用兩組浮動接地振盪器來模擬中頻端與本地端之訊號源，以固定中頻相位情形下，調整本地端壓控振盪器，來達成本地端相移器之功能，量測結果於1×2可達到波束掃動範圍為-30°~23°，於1×3可達到波束掃動範圍為-28°~24°。
The thesis put forward a brand-new structure of coupling network. The coupling network contains a reference ground of the circuit and an inductor which is the only connection between the reference ground and the earth ground. This kind of coupling network is called “Wavy Ground Network”. By the characteristic of coupling in the wavy ground structure, the voltage controlled oscillators, which are connected to the reference ground of the structure, will have the phenomenon of the injection locking.Under the situation of locking, the variation of tuning voltage will transform to the difference of phase between VCOs, while the free-running frequency does not exceed the locking range of the circuit. Therefore, the phase difference of the output signal will steer the beam to wanted directions. At first, the simulation of the wavy ground structure should be concerned to predict the feasibility and the characteristic. By the results of the simulation, there are two kinds of the situations about the initial phase difference between the output signals which are caused by the distance between VCOs. One of the situation is the in-phase mode of synchronization, another is the anti-phase mode of synchronization. The on-board circuit will be designed with the rule of in-phase mode of synchronization. The circuit will be confirmed that if it will have mutual-locking phenomenon and phase-shifting function. The measurement result as below : Phase tuning range is -67.5°~74.6°at 2.3 GHz, and -73°~72° at 1.6 GHz. Both of the output power is 10 dBm. The power consumption is 210 mW. To extend the function of the phase tuning, there are two set of the wavy ground structure to pretend to be the IF signal and LO signal. While the phase difference of the IF signal is fixed to zero, the variation of the tuning voltage at local VCO will cause the phase shifting. The measurement result of the beam swapping range is -30°~23°
病人流失預測之研究-以南部某診所減肥病人為例;Research on patient churn prediction:Taking patients for weight reduction in the clinic in the south of Taiwan as an example
No full text[[abstract]]過去對顧客忠誠之研究甚多，已經確定了減少顧客流失的重要性，也讓我們了解影響顧客流失的原因；病人流失可能會造成醫療延遲與資療浪費的重大結果，與病人健康及醫療院所經營非常相關，所以降低病人流失很重要，了解並預測病人的流失是一個有意義的研究題目。回顧文獻，資料探勘是一種探討顧客流失常用的研究方法，但是用在病人流失方面卻是相當稀少，尤其是研究台灣的病人流失幾乎是沒有。本研究是針對診所病人之個人資料等較客觀因素，採資料探勘方法探查病人流失情形，以了解影響診所減肥病人流失的原因。本研究收集台灣南部某診所2015?6月1日至2015?12月31日間，減肥民眾主動至該診所尋求減肥協助時第一次就診(初診)時自填的所有紙本資料，獲得65個變數，經資料篩選、前處理後，刪除資料遺漏值過多或資料錯誤之筆數，共計850筆；運用資料探勘中的決策樹C4.5(J48)、支援向量機(SVM)、風險樹CART decision tree、Random Forest和羅吉斯迴歸Logistic Regression等技術，預測減肥病人三個月流失情形。結果顯示，預測效能最佳的是隨機森林(RandomForest)(AUC：94.7%)；影響初診後三個月病人流失的因子其重要性前五名依序為正使用類固醇藥物、收縮壓、體重、身體質量指數、腰圍，其他如增胖原因為更年期後、體脂、期望減肥值、年齡及減肥動機未明等因子也可提供臨床醫師在病人減肥初診評估時的參考依據，給予適當處置，使三個月病人流失減少，以提昇就醫順從性，進而增加減肥成效。
The study enrolled a total of 850 patients undergoing weight reduction between June 2015 to December 2015 in a clinic in southern Taiwan. Data on preparation of self-reported questionaire were investigated by using data mining techniques, including decision tree, simple logistic regression, classification and regression trees, support vector machine, and random forest to predict the churn after 12-week follow up. The model constructed by using random forest performed best with an area under curve of 94.7%.The study identified several critical factors for the prediction of 12-week missed appointment of the patients for weight reduction, including current steroid treatment, systolic blood pressure, initial weight, initial BMI, initial waist circumference, expectations of result, obvious increased weight after menopause, age, and unknown motivation. These findings can help clinicians evaluate the risk of 12-week missed appointment when the patient ask for weight reduction, and provide individualized intervention for decreasing the churn and increasing the effectiveness of weight reduction
基於LDA於雲端上基本表情分類設計與實現;The design & impementations of emotional classifications according to the cloud of LDA
No full text[[abstract]]摘要以往人臉辨識研究，主要使用圖像蒐集與分類，利用圖像特徵完成身份確認與查找技術。現今該技術研究，已由靜態圖像進階為動態影像，比如先進駕駛輔助系統(Advanced Driver Assistance Systems, ADAS)、學習記錄資料庫(Learning Record Store, LRS)、行人跟蹤系統等等就是此類的應用。因此現代影像辨識技術，不僅僅要達到身分確認而已，更希望從中得到更多的訊息，例如人類精神狀態、情緒起伏、行為表現等不同特徵。本論文目的，為透過遠端多攝影機與多角度辨識人類行為，而這些行為資料是可不斷被記錄下來的，為了將來學習歷程記錄的應用，所以實驗必須達成以下三個目標，以達成動態影像歷程大數據資料儲存分析使用：(1) 遠端攝影機即時影像傳送。(2) 動態影像達成身分確認。(3) 動態影像達成情緒辨識。研究一開始，我們使用的是經典演算法中的主成分分析與線性判別分析，在推導公式過程中，可以很清楚地了解演算法的精髓與由來，因此，之後研究上遇到數據降維與投影矩陣選擇等問題，都可以做很清楚的分析與演算。在實驗中我們使用Raspberry Pi架設串流伺服器，將攝影機錄到的影像，透過視頻串流把影像上傳至雲端，再由遠端或行動等裝置在此串流伺服器上取得即時視頻，便可立即辨識出該人的身分，並以基本表情做情緒辨識，以此做為雲端大數據個人身分與行為表徵的基礎應用。最後，此篇研究對於大數據資料與雲端資料庫的學習應用，做了以下三項貢獻。(1) 透過即時串流，可於任意位置甚至多攝影機下同時蒐集行為資料。(2) 即時影像串流下，可於每分鐘平均蒐集行為圖像112張，行為辨識率達89.4%，透過移動平均濾波可以提高資料蒐集正確性達94.6%。(3) 使用線性判別分析演算法分析人臉，再使用主成分分析來區分表情，有效降低演算時間複雜度，比單單使用線性判別或主成分分析的效果都來得要好。
AbstractMost of conventional techniques applied by facial recognition include data collection, classification, preprocessing, standardization, identification, searching, etc. Now, ADSA (Advanced Driver Assistance Systems) is a successful and important application based on the technique of facial recognition to detect the dynamic and instant driving situations concerning about the driver, passengers inside or near the car and then successively provides a safe guide for further driving. In this application, the streaming video is required to be processed by the real-time response. Until now, we can find that a couple of conventional applications based on the techniques of facial recognition are required to have the processing ability of real-time responsibility. In this research, we try to propose some real-time solutions not only for finding user’s face, but also user’s characteristics including expression, mood, etc. We build a streaming server to collect the instant data scanning from a Raspberry Pi device. Then, we design some processing algorithms based on PCA and LDA on the server site to realize the proposed tasks of facial recognition. Our results can almost reach the real-time requirement. For further research, we will redesign the structure of projection space to solve the over fitting problem due to the successively coming big data of facial images