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Ultralow-Power Programmable 3D Vertical Phase-Change Memory with Heater-All-Around Configuration
No full textRecent advancements in phase-change memory (PCM) technology have predominantly stemmed from material-level designs, which have led to fast and durable device performances. However, there remains a pressing need to address the enormous energy consumption through device-level electrothermal solutions. Thus, the concept of a 3D heater-all-around (HAA) PCM fabricated along the vertical nanoscale hole of dielectric/metal/dielectric stacks is proposed. The embedded thin metallic heater completely encircles the phase-change material, so it promotes highly localized Joule heating with minimal loss. Hence, a low RESET current density of 6-8 MA cm(-2) and operation energy of 150-200 pJ are achieved even for a sizable hole diameter of 300 nm. Beyond the conventional 2D scaling of the bottom electrode contact, it accordingly enhances approximate to 80% of operational energy efficiency compared to planar PCM with an identical contact area. In addition, reliable memory operations of approximate to 10(5) cycles and the 3-bits-per-cell multilevel storage despite ultrathin (<10 nm) sidewall deposition of Ge2Sb2Te5 are optimized. The proposed 3D-scaled HAA-PCM architecture holds promise as a universally applicable backbone for emerging phase-change chalcogenides toward high-density, ultralow-power computing units.
Total Synthesis of (+)-Herpotrichones A-C
No full textEpoxyquinoids herpotrichones A-C exhibit unique 6/6/6/6/3 pentacyclic frameworks and potent neuroprotective effects. Inspired by their proposed biosynthetic origins, we completed a total synthesis of herpotrichones A-C by devising a de novo synthesis of epoxyquinol monomer and leveraging a key Diels-Alder (DA) reaction between epoxyquinol monomer-based dienophiles and delitpyrone C-derived dienes. DFT calculations anticipated competing pathways, including homodimerization and regio- and stereoisomers formation, necessitating precise control over reaction selectivity during the key DA reaction. We discovered that the C2 ' hydroxyl configuration of delitpyrone C is critical in directing the desired DA reaction, with hydrogen bonding playing a decisive role in product formation. This strategy enabled synthetic access to the herpotrichone core and facilitated the first total synthesis of all known herpotrichones.
3D 낸드 플래시 메모리 성능 및 수명 향상을 위한 부분 블록 리프레시 기법 설계
No full text학위논문(석사) - 한국과학기술원 : 전산학부, 2025.2,[iv, 38 p. :]To address the increasing reliability challenges of 3D NAND flash memory, modern SSDs employ error correction codes (ECC), read retry operations, and refresh techniques. Among these, the refresh process is effective in permanently eliminating error bits. However, the refresh technique introduces significant overhead in terms of performance and lifetime of NAND flash memory. Moreover, existing block-granularity refresh schemes exacerbate these issues by causing unnecessary page copies due to the large block size and layer-to-layer variation inherent in 3D NAND flash memory. In this paper, we propose a novel refresh scheme, Partial Block Refresh (PABLOR), that selectively refreshes certain valid pages within a block. Unlike existing block-granularity refresh schemes that refresh all valid pages within a block, PABLOR selectively identifies and refreshes only the vulnerable pages within a block. Although PABLOR can reduce unnecessary page copies, PABLOR may lead to potential degradation in read performance. To address potential read performance degradation, we propose PABLOR+, which tracks read retry counts and mitigates performance impacts. Evaluation using eight real-world workloads demonstrates that PABLOR and PABLOR+ significantly outperform the baseline refresh scheme. They achieve average page copy reductions of 63%, 26%, and 24% at 0K, 2K, and 4K P/E cycles, respectively.한국과학기술원 :전산학부
구조적 에피소딕 메모리를 활용한 언어 명령 수행 마인크래프트 에이전트
No full text학위논문(석사) - 한국과학기술원 : 전산학부, 2025.2,[iv, 47 p. :]Significant advances have been made in developing general-purpose embodied AI in environments like Minecraft through the adoption of LLM-augmented hierarchical approaches. While these approaches, which combine high-level planners with low-level controllers, show promise, low-level controllers frequently become performance bottlenecks due to repeated failures. In this paper, we argue that the primary cause of failure in many low-level controllers is the absence of an episodic memory system. To address this, we introduce MrSteve (Memory Recall Steve-1), a novel low-level controller equipped with Place Event Memory (PEM), a form of episodic memory that captures what, where, and when information from episodes. This directly addresses the main limitation of the popular low-level controller, Steve-1. Unlike previous models that rely on short-term memory, PEM organizes spatial and event-based data, enabling efficient recall and navigation in long-horizon tasks. Additionally, we propose an Exploration Strategy and a Memory-Augmented Task Solving Framework, allowing agents to alternate between exploration and task-solving based on recalled events. Our approach significantly improves task-solving and exploration efficiency compared to existing methods.한국과학기술원 :전산학부
디포머블 리샘플링 기반 정렬을 통한 비디오 초해상도 향상에 관한 연구
No full text학위논문(석사) - 한국과학기술원 : 전산학부, 2025.2,[iv, 36 p. :]Video Super Resolution (VSR) aims to generate high-resolution (HR) frames from low-resolution (LR) inputs. A key component of VSR is the alignment module, which typically includes two parts: a flow estimation module and a resampling module. State-of-the-art VSR methods often use pre-designed flow estimation networks with multi-step resampling to realign frames. This approach corrects inaccuracies in flow estimation and improves the limitations of traditional resampling techniques such as bilinear and nearest-neighbor interpolation. We propose a new alignment module based on a single-step deformable resampling approach to address these challenges. Utilizing a deformable window-based network, our approach adaptively learns reference points surrounding the sampling point. Additionally, our crossmamba block implicitly encodes the sampling point with surrounding information. Our deformable resampling alignment module demonstrates state-of-the-art performance across various benchmarks while maintaining low memory and computational costs.한국과학기술원 :전산학부
가중 순서 통계 필터링을 하기 위한 도메인 특화 프로세서
No full text학위논문(석사) - 한국과학기술원 : 전산학부, 2025.2,[iv, 57 p. :]The goal of this project is to design a hardware solution aimed at accelerating the rank-order filter, with a particular emphasis on morphological operations. Different architectures for rank-order filters have been analyzed, and 1D and 2D rank-order filters based on the systolic array architecture have been designed, implemented, and evaluated. First, the filters have been extended in order to adjust the window size at runtime, and thereafter, a binary mask has been applied to the kernel, to be able to change the shape of the window.
To see how the filter will be applied in a real-world scenario and analyze the effective speed-up, the filter has been integrated into a custom processor based on the RISC-V ISA. It was found that running the processor with the accelerator compared to a typical software solution, which runs on the processor without the accelerator, that the hardware solution, provided a significant performance improvement. Speedups ranging from 30x to 40x were observed for the input samples used in the testing.한국과학기술원 :전산학부
Indicator Guidance: Classifier-Free Guidance를 확장한 연속형 조건부 확산 모형
No full text학위논문(석사) - 한국과학기술원 : 데이터사이언스대학원, 2025.2,[v, 28 p. :]Recently, significant progress has been made in the field of conditional diffusion models. In particular, classifier-free guidance (CFG) has gained widespread adoption due to its efficiency and simplicity. However, CFG has a limitation in that it can only be applied to class-conditional variables. To overcome this limitation, we propose a new conditional diffusion model called Indicator Guidance (IG). IG extends the CFG framework to handle continuous conditional variables. IG leverages indicators and resampling techniques to simultaneously train the models required for conditional data generation with guidance. While maintaining the same computational complexity and hyperparameters as CFG, IG enables conditional data generation using both multiple continuous conditional variables. Furthermore, IG shares a highly similar structure with CFG, making it easily integrable into existing research and systems. To evaluate the performance of IG, we conducted experiments across various tasks. Additionally, we propose a user feedback-based generation method to achieve more sophisticated conditional data generation. This method's effectiveness was demonstrated through experiments generating composite sketches using the Asian Composite dataset.한국과학기술원 :데이터사이언스대학원
휴지기 뇌 연결성의 그래프 신경망 분석에서 나타나는 성별 오분류
No full text학위논문(석사) - 한국과학기술원 : 데이터사이언스대학원, 2025.2,[iv, 42 p. :]This study explores the use of resting-state functional connectivity derived from the UK Biobank dataset to classify biological sex. Functional connectomes, constructed from fMRI time series, were represented as graphs to capture the complex and distributed patterns of brain connectivity. Graph Neural Networks (GNNs) were applied to model both local and global dependencies, leveraging the inherent structure of brain networks. Among the approaches tested, GNN-based methods demonstrated superior ability to capture subtle connectivity differences compared to traditional machine learning models. The results highlighted the potential of GNNs for analyzing functional connectomes, uncovering meaningful patterns related to sex differences in brain connectivity. However, the findings also revealed inherent challenges in achieving high classification accuracy due to the subtle and distributed nature of these patterns. This underscores the need for further exploration of complementary features, such as structural or genetic data, and improved model architectures to enhance the interpretability and accuracy of classification.한국과학기술원 :데이터사이언스대학원
SRAM PIM 컴파일러 설계 및 ML을 이용한 NLDM 추출
No full text학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2025.2,[v, 32 p. :]Processing-in-Memory (PIM) integrates computational capabilities directly into memory, enabling significantly improved computational efficiency. However, current PIM designs heavily rely on full-custom design, from unit cell to overall architecture, resulting in substantial time and effort costs. Therefore, there is a growing demand for a PIM compiler that is capable of automatically generating SRAM PIM designs to satisfy user requirements. This paper proposes (1) a parameter-based SRAM PIM compiler design and (2) ML-assisted NLDM extraction. Experimental results demonstrate that the generated SRAM PIM design achieves performance of the reference design. Additionally, the predicted NLDM values show a mean absolute percentage error (MAPE) of 3.0% compared to the reference values, confirming the reliability of the proposed method.한국과학기술원 :전기및전자공학부
BCH와 RS 오류 정정 부호를 위한 부/복호 하드웨어 가속기의 자동 생성
No full text학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2025.2,[iii, 36 p. :]BCH codes and RS codes are error correction codes used in communication and memory storage systems, employing algebraic approaches based on finite fields and polynomials to correct errors. BCH codes offer a good balance of hardware complexity and strong error correction performance, while RS codes correct errors at the symbol level, making them effective for correcting burst errors. These two codes, in particular, are widely used in SSDs and the recently emerging HBM technologies, with ongoing research into their hardware implementations. However, implementing the hardware is a challenging and time-consuming process, as it requires not only knowledge of the coding theory but also experience in efficient hardware design. In this study, we analyze the hardware structures of BCH and RS encoders and decoders developed so far and propose an automatic generator that simplifies their implementation. Additionally, we suggest new structures and system implementations for decoder designs, offering an efficient hardware implementation through an automatic generator. This generator can also act as an assistant, allowing for easy hardware implementation tailored to specific requirements and offering the flexibility to choose the necessary structure when needed.한국과학기술원 :전기및전자공학부