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A CMOS bandpass filter for low-IF bluetooth receivers
A CMOS fully integrated 12th-order bandpass filter for low interemdiate frequency Bluetooth receivers is presented. The design is optimized to meet the selectivity and dynamic range requirements of Bluetooth while consuming relatively low power. The filter is based on unity gain cells and utilizes linearized MOSFET resistors for tuning. It exhibits a bandwidth of 1 MHz and a programmable center frequency range of 2 to 4 MHz. Experimental results obtained from a standard 0.5-/spl mu/m CMOS chip show that the filter exhibits an in-band dynamic range of 53.3 dB at gain of 0 dB, and 52 dB at gain of 15 dB, while consuming a total current of 1.32 mA. Attenuations of more than 10, 38, and 55 dB, are achieved for blockers one, two, and three, respectively
Skin Detection using a Markov Random Field and a New Color Space
In this paper, human skin detection is performed using a new color space coordinate and a Markov random field based approach. The proposed color space uses a variant of the principal component analysis technique to reduce the number of color components. The MRF model takes into account the spatial relations within the image that are included in the labeling process through statistical dependence among neighboring pixels. Since only two classes are considered the Ising model is used to perform the skin/non-skin classification proces
Design of PSS and STATCOM-based damping stabilizers using genetic algorithms
Power system stability enhancement via coordinated design of power system stabilizers (PSSs) and STATCOM-based damping stabilizers is thoroughly investigated in this paper. This study presents a singular value decomposition (SVD) based approach to assess and measure the controllability of the poorly damped electromechanical modes by different control inputs. The coordination among the proposed damping stabilizers and the STATCOM internal AC and DC voltage controllers has been taken into consideration. The design problem of STATCOM-based stabilizers is formulated as an optimization problem. Then, a real-coded genetic algorithm (RCGA) is employed to search for optimal stabilizer parameters. The nonlinear simulation results show the effectiveness and robustness of the proposed control schemes over a wide range of loading conditions
Performance of Resource Efficient Routing Protocols for ireless Ad-hoc Networks in the Presence of Channel Fading
Adhoc networks interconnect mobile terminals without intervention of a base station in other words these networks do not use traditional infrastructure of base stations to interconnect to complete a communication link. In these networks, the mobile units operate in store and forward mode until the data reaches the destination. Due to mobility of the participating nodes, the network configuration continuously changes and the currently route in use may not be available. This necessitates establishing a new route. This paper compares the network throughput for several protocols from the point of view of resource efficiency when the channel fading is present
Multiobjective evolutionary algorithms for electric power dispatch problem
The potential and effectiveness of the newly developed Pareto-based multiobjective evolutionary algorithms (MOEA) for solving a real-world power system multiobjective nonlinear optimization problem are comprehensively discussed and evaluated in this paper. Specifically, nondominated sorting genetic algorithm, niched Pareto genetic algorithm, and strength Pareto evolutionary algorithm (SPEA) have been developed and successfully applied to an environmental/economic electric power dispatch problem. A new procedure for quality measure is proposed in this paper in order to evaluate different techniques. A feasibility check procedure has been developed and superimposed on MOEA to restrict the search to the feasible region of the problem space. A hierarchical clustering algorithm is also imposed to provide the power system operator with a representative and manageable Pareto-optimal set. Moreover, an approach based on fuzzy set theory is developed to extract one of the Pareto-optimal solutions as the best compromise one. These multiobjective evolutionary algorithms have been individually examined and applied to the standard IEEE 30-bus six-generator test system. Several optimization runs have been carried out on different cases of problem complexity. The results of MOEA have been compared to those reported in the literature. The results confirm the potential and effectiveness of MOEA compared to the traditional multiobjective optimization techniques. In addition, the results demonstrate the superiority of the SPEA as a promising multiobjective evolutionary algorithm to solve different power system multiobjective optimization problems
Online Development of Digital Logic Design Course
Over the past few years, a shift to the use of multimedia in teaching is being implemented to enhance the learning process. This paper outlines the experience obtained through the development of digital design course to be taught online over the Internet. It discusses the advantages and disadvantages of these innovative learning strategies over the traditional chalkboard learning. This e-course has been in use since the completion of the development phase and is now in its second year of implementation. Initially, it was used entirely as supporting or supplementary material. Feedback taken from students indicated that the e-material enhanced their understanding of the course. Currently, it is being tested in the blended mode where selected material from the e-course is taught to students completely online
An Efficient Test Vector Compression Technique Based on Block Merging
In this paper, we present a new test data compression technique based on block merging. The technique capitalizes on the fact that many consecutive blocks of the test data can be merged together. Compression is achieved by storing the merged block and the number of blocks merged. It also takes advantage of cases where the merged block can be filled by all 0’s or all 1’s. Test data decompression is performed on chip using a simple circuitry that repeats the merged block the required number of times. The decompression circuitry has the advantage of being test data independent. Experimental results on benchmark circuits demonstrate the effectiveness of the proposed technique compared to previous approaches
High Performance Elliptic Curve GF(2m) Crypto-processor
This study presents a high performance elliptic curve cryptoprocessor architecture over GF(2m). The proposed architecture exploits parallelism at the projective coordinate level to perform parallel field multiplications. Comparisons between the Projective, Jacobian and Lopez-Dahab coordinate systems using sequential and parallel designs are presented. Results show that parallel designs gives better area-time complexity (AT2) than sequential designs by 44-252% which leads to a wide range of design tradeoffs. The results also show that the Projective coordinate system gives the best AT2 in parallel designs with the least number of multiplications levels when using 4 multipliers
Highly Efficient Elliptic Curve Crypto-Processor with Parallel GF(2m) Field Multipliers
This study presents a high performance GF(2m) Elliptic Curve Crypto-processor architecture. The proposed architecture exploits parallelism at the projective coordinate level to perform parallel field multiplications. In the proposed architecture, normal basis representation is used. Comparisons between the Projective, Jacobian and Mixed coordinate systems using sequential and parallel designs are presented. Results show that parallel designs using normal basis gives better areatime complexity (AT2) than sequential designs by 33-252% which leads to a wide range of design tradeoffs. The results also show that mixed coordinate system is the best in both sequential and parallel designs and gives the least number of multiplications levels when using 3 multipliers and the best AT2 when using only 2 multipliers
Semi-Random LDPC Codes for CDMA Communication over Nonlinear Bandlimited Satellite Channels
This paper considers the application of low-density parity check (LDPC) error correcting codes to code division multiple access (CDMA) systems over satellite links. The adapted LDPC codes are selected from a special class of semi-random (SR) constructions characterized by low encoder complexity, and their performance is optimized by removing short cycles from the code bipartite graphs. Relative performance comparisons with turbo product codes (TPC) for rate 1/2 and short-to-moderate block sizes show some advantage for SR-LDPC, both in terms of bit error rate and complexity requirements. CDMA systems using these SR-LDPC codes and operating over non-linear, band-limited satellite links are analysed and their performance is investigated for a number of signal models and codes parameters. The numerical results show that SR-LDPC codes can offer good capacity improvements in terms of supportable number of users at a given bit error performance