King Fahd University of Petroleum and Minerals

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    7294 research outputs found

    Delay and Power Efficient Voice Transmission over MANET

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    Increasing speed of hardware device and versatile functionalities of small equipments e.g. laptop, PDA etc. are introducing various voice oriented applications with mobility. Like other computer networks, in Mobile Ad-hoc Network (MANET) voice transmission is very much demanding and necessary. In this research paper we have a feasibility analysis of voice transmission over MANET. Since voice applications consume more energy than typical applications, we use an energy aware routing protocol known as WEAC for the study. We have a comparative study among several audio codecs (G.711, G.729 and G.723.1) and by simulation we show that the G.729 codec is suitable to use for voice transmission over MANET in terms of latency. We show that it is possible to launch voice transmission with acceptable quality over MANET using G.729 and WEAC protocol

    "A Tabu Search Approach for the Design of Variable Structure Load Frequency Controller Incorporating Model Nonlinearities"

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    This paper presents a new method of designing Variable Structure Controllers (VSC) applied to the Load Frequency Control (LFC) problem. The proposed method formulates the design of VSC as an optimization problem and utilizes Tabu Search Algorithm (TS) to find the optimal settings of the controller. The objective function used in the optimization process guarantees enhancement of the controller performance and reduces VSC chattering. The designed VSC is applied to LFC model that incorporates the nonlinearity of the Generation Rate Constraint (GRC). Furthermore, the complexity of the controller is reduced by using only the accessible states in designing the VSC. Comparison with other LFC methods reported in literature validates the significance of the proposed VSC design

    On the Control Strategies of Shunt FACTS Devices for the Improvement of Transient Stability

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    To enhance power system transient stability, shunt FACTS devices can be controlled in discontinuous mode or in a combination of discontinuous and continuous mode. This paper investigates the latter discontinuous then continuous control strategy in a view to improve angle and speed response. In continuous mode, it is found that proper selection of controller gain plays an important role on proportional controller performance. Nonlinear timedomain simulation with various ratings of SVC and STATCOM shows that controller gain-setting depends on FACTS device rating. Gain of the controller is optimized for minimum settling time and overshoot using Particle Swam Optimization (PSO) technique and results are verified using time-domain simulation

    Development of intercity work mode choice model for Saudi Arabia

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    Low Speed Calibration of Hot-Wire Anemometers

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    A Heuristic Approach for Firewall Policy Optimization

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    A primary goal of this paper is to develop a heuristic approach based on genetic algorithms to enhance the firewall performance. Typical firewall policies may have thousands of rules and determining an optimal rule order that minimizes the average number of rule comparisons while maintaining the policy integrity is proven to be NP-hard. This problem is formulated as a binary integer program for which an optimal solution is obtained using the branch-and-bound technique. Then an alternative solution approach is devised based on genetic algorithms. Several experiments are conducted to evaluate the effectiveness of the proposed approach as compared to other rule-ordering techniques. Empirical results show the potential and flexibility of the proposed approach

    Parallel Algorithms for Look-Up Table (LUT) Inverse Halftoning

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    The Look-Up Table (LUT) method for inverse halftoning is fast and computation-free technique employed to obtain good quality images. In this work we propose six algorithms to parallelize the LUT method so that more pixels can be concurrently inverse halftone using minimum additional hardware. The proposed algorithms partition the single LUT of serial LUT method into N smaller Look-Up Tables (s − LUTs) such that the total number of contents in all s−LUTs remain equal to the number of contents in the single LUT of serial LUT method. The proposed parallel algorithms have image quality equal to the serial LUT method when gain in clock cycles over the serial method is less and have lesser image quality comparetively to serial LUT method when gain in clock cycles over the serial method is very high. The parallel algorithms can be implemented on FPGA (Field Programmable Gate Arrays) devices with external CAM (Content Addressable Memories) and ROM (Read Only Memories)

    Algorithm for Parallel Inverse Halftoning using Partitioning of Look-Up Table (LUT)

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    The Look-Up Table (LUT) method for inverse halftoning is fast and computation-free technique employed to obtain good quality images. In this work we propose a new algorithm to parallelize the LUT method so that more pixels can be concurrently inverse halftoned using minimum additional hardware. The proposed algorithm partitions the single LUT of serial LUT method into N smaller Look-Up Tables (s-LUTs) such that the total number of entries in all s-LUTs remain equal to the number of entries in the single LUT of serial LUT method. The proposed algorithm can be implemented on a single FPGA (Field Programmable Gate Arrays) device with external memories to store s-LUTs

    IMPROVING BER PERFORMANCE OF LDPC CODES BASED ON INTERMEDIATE DECODING RESULTS

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    The paper presents a novel approach to reduce the bit error rate (BER) in iterative belief propagation (BP) decoding of low density parity check (LDPC) codes. The behavior of the BP algorithm is first investigated as a function of number of decoder iterations, and it is shown that typical uncorrected error patterns can be classified into 3 categories: oscillating, nearly-constant, or random-like, with a predominance of oscillating patterns at high Signal-to-Noise (SNR) values. A proposed decoder modification is then introduced based on tracking the number of failed parity check equations in the intermediate decoding iterations, rather than relying on the final decoder output (after reaching the maximum number of iterations). Simulation results with a rate ½ (1024,512) progressive edge-growth (PEG) LDPC code show that the proposed modification can decrease the BER by as much as 10-to-40%, particularly for high SNR values

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