Swedish Institute of Computer Science Publications Database
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Vertical Test Reuse for Embedded Systems: A Systematic Mapping Study
No full textAbstract
—Vertical test reuse refers to the the reuse of test cases or other test artifacts over different integration levels in the software or system engineering process. Vertical test reuse has
previously been proposed for reducing test effort and improving
test effectiveness, particularly for embedded system development.
The goal of this study is to provide an overview of the state of
the art in the field of vertical test reuse for embedded system
development. For this purpose, a systematic mapping study has
been performed, identifying 11 papers on vertical test reuse for
embedded systems. The primary result from the mapping is
a classification of published work on vertical test reuse in the
embedded system domain, covering motivations for reuse, reuse
techniques, test levels and reusable test artifacts considered, and
to what extent the effects of reuse have been evaluated
Timetabling based on generalised cost
No full textThe liberalised railway market of today calls for new methods to plan the annual
timetable. A conflict between two railway undertakings operating in the same market
is hard to solve using the current method. Common price setting strategies such as
auctions, framework agreements and spot markets may be of help. To administer a long
term stability for an operator, framework agreements can be entered. These framework
agreements should be valid for several years but still not consume too much capacity
from other operators. In this report we propose a novel mathematical model calculating
the benefit of subsidised traffic, based on the generalised cost of it’s timetable and
optimisation models are developed. The calculated benefit is weighted against traffic
from other operators, to provide a decision support for concluding the content of the framework agreements
An Emulation-based Method for Lifetime Estimation of Wireless Sensor Networks
No full textLifetime estimation in Wireless Sensor Networks
(WSN) is crucial to ensure that the network will last long enough
(low maintenance cost) while not being over-dimensioned (low
initial cost). Existing solutions have at least one of the two
following limitations: (1) they are based on theoretical models or
high-level protocol implementations, overlooking low-level (e.g.,
hardware, driver, etc.) constraints which we find have a significant
impact on lifetime, and (2) they use an ideal battery model
which over-estimates lifetime due to its constant voltage and its
inability to model the non-linear properties of real batteries. We
introduce a method for WSN lifetime estimation that operates on
compiled firmware images and models the complex behavior of
batteries. We use the MSPSim/Cooja node emulator and network
simulator to run the application in a cycle-accurate manner and
log all component states. We then feed the log into our lifetime
estimation framework, which models the nodes and their batteries
based on both technical and experimental specifications. In a case
study of a Contiki RPL/6LoWPAN application, we identify and
resolve several low-level implementation issues, thereby increasing
the predicted network lifetime from 134 to 484 days. We compare
our battery model to the ideal battery model and to the lifetime
estimation based on the radio duty cycle, and find that there is
an average over-estimation of 36% and 76% respectively
RunRight - Real-Time Visual and Audio Feedback on Running
No full textRunRight is a system that gives two different kinds of feedback for runners. First, it creates a visualization of the running movement based on acceleration in vertical and horizontal direction. Second it gives audio feedback on the rhythm. These two types of feedback are valuable when exploring how to design technology that supports athletes in learning how a desired movement should feel