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CMS Inner Tracker Upgrade for the HL-LHC Design, Development, and Production Status
The High Luminosity Large Hadron Collider operation will push the CMS experiment to its limits, with an instantaneous peak luminosity of and an integrated luminosity of per year. This environment will expose the CMS Inner Tracker (IT) pixel detector at the center of CMS to unprecedented levels of radiation, with a 1 MeV neutron equivalent fluence of and a total ionizing dose of after of integrated luminosity. To endure these conditions and handle hit rates of while managing a pileup of 140 to 200 collisions per bunch crossing, the new IT system will employ a highly granular design with thin silicon sensors, small pixels (), and fast, radiation-hard electronics based on a CMOS ASIC developed by the RD53 collaboration. A novel serial powering scheme and high-bandwidth readout system will support the upgraded modules, while lightweight carbon-fiber mechanics with two-phase CO cooling will ensure structural integrity. The design will extend the tracking coverage up to . This contribution presents an overview of the CMS IT upgrade project, focusing on the ongoing activities and status of the module production of all the IT subsystems
Poster Session & Awards CMS Upgrade Week April 2025
Photos of the poster session and the poster awards during CMS Upgrade Week 7th - 11th April 2025. This week focused on the High Luminosity build of CMS and the work being done to prepare for this. Winners of the best poster awards were: Francesco Orlandi, Trisha Debnath, and John Dervan
Supporting the development of Machine Learning for fundamental science in a federated Cloud with the AI_INFN platform
Machine Learning (ML) is driving a revolution in the way scientists design, develop, and deploy data-intensive software. However, the adoption of ML presents new challenges for the computing infrastructure, particularly in terms of provisioning and orchestrating access to hardware accelerators for development, testing, and production. The INFN-funded project AI_INFN ("Artificial Intelligence at INFN") aims at fostering the adoption of ML techniques within INFN use cases by providing support on multiple aspects, including the provision of AI-tailored computing resources. It leverages cloud-native solutions in the context of INFN Cloud, to share hardware accelerators as effectively as possible, ensuring the diversity of the Institute's research activities is not compromised. In this contribution, we provide an update on the commissioning of a Kubernetes platform designed to ease the development of GPU-powered data analysis workflows and their scalability on heterogeneous, distributed computing resources, possibly federated as Virtual Kubelets with the interLink provider
ALICE Visit of EPS Communication Coordinator Gina Gunaratnam
ALICE underground visit of EPS Communication Coordinator Gina Gunaratnam with Alessandra Fantoni and Tapan Naya
A Possible Future Use of the LHC Tunnel
The FCC program at CERN provides an attractive all-in-one solution to address many of the key questions in particle physics. While we fully support the efforts towards this ambitious path, we believe that it is important to prepare a mitigation strategy in case the program faces unexpected obstacles for geopolitical or other reasons. This approach could be based on two components: I) a circular electron-positron collider in the LHC tunnel that operates at the Z-pole energy of 45.6 GeV and II) a high-energy electron-positron linear collider which acts as a Higgs, top quark and W-boson factory, and that can further be extended to TeV energies. The former could reach a high luminosity that is not accessible at a linear collider, the latter could probe the high energy regime with higher sensitivity and discovery potential than LEP3. The program should be flanked by dedicated intensity frontier searches at lower energies. These accelerators can be used in a feasible, timely and cost-efficient way to search for new physics and make precise determination of the parameters of the Standard Model
EOS 2025 Workshop
We will present an overview of the current state of the S3 gateway for EOS
Use of time information in the High Granularity Calorimeter at the CMS experiment
The High-Luminosity phase of the Large Hadron Collider (HL-LHC) starting in 2029 poses unprecedented challenges in terms of data acquisition and event reconstruction. Significant upgrades are planned for both detectors and software to tackle these challenges. Among the strategies adopted by the Compact Muon Solenoid (CMS) experiment there is the incorporation of time-related information from sub-detectors, facilitated by advancements in technology and faster electronics.The forthcoming High Granularity Calorimeter (HGCAL) is set to replace the current electromagnetic and hadronic calorimeters in the Endcaps. Apart from its exceptional spatial resolution, HGCAL will introduce precise time measurements for high-energy deposits, allowing for a comprehensive 5D reconstruction (x, y, z, t, E) of particle showers. The front-end electronics will measure the time of arrival of pulses above a charge threshold, achieving a resolution as fine as 25 ps for high individual energy deposits.This research highlights the integration of timing information from the High Granularity Calorimeter into event reconstruction and its use in combination with the information coming from the dedicated timing layer, the MIP Timing Detector, heading towards an enhanced global event interpretation in the high pileup environment of the HL-LHC
Tree Tensor Network implemented on FPGA as ultra-low latency binary classifiers
Tensor Networks (TNs) are a computational framework traditionally used to model quantum many-body systems. Recent research has demonstrated that TNs can also be effectively applied to Machine Learning (ML) tasks, producing results comparable to conventional supervised learning methods. In this work, we investigate the use of Tree Tensor Networks (TTNs) for high-frequency real-time applications by harnessing the low-latency capabilities of Field-Programmable Gate Arrays (FPGAs). We present the implementation of TTN classifiers on FPGA hardware, optimized for performing inference on classical ML benchmarking datasets. Various degrees of parallelization are explored to evaluate the trade-offs between resource utilization and algorithm latency. By deploying these TTNs on a hardware accelerator and utilizing an FPGA integrated into a server, we fully offload the TTN inference process, demonstrating the system’s viability for real-time ML applications