5975 research outputs found
Sort by
Cogging Torque Reduction Technique on E-Core Hybrid Flux Switching Motor by Notching and Pole Pairing
No full textIn the past, 4S-10P E-Core Hybrid Flux Switching Motor (HFSM) had been studied. However, the motor suffers high cogging torque but it has high performance in terms of high power and high torque at high speed. Therefore, this paper is proposing the cogging torque reduction techniques to minimize the cogging torque. The high cogging torque gave an undesirable effect during low operating speed of the motor. In order to tackle the issue, the cogging torque mechanism in equation is laid out as a form of reference. Then the reduction techniques employed on the designs and analyzed with Finite Element analysis (FEA) in JMAG. The results show the cogging torque of the optimized design is 44.45% of the motor torque. Besides, the techniques employed to identify which techniques gave the most cogging torque reduction and analyzed the geometrical difference using the cogging torque mechanism. Finally, the analysis is discussed based on the modified geometrics
A Novel Approach in Scheduling Of the Real- Time Tasks In Heterogeneous Multicore Processor with Fuzzy Logic Technique For Micro-grid Power Management
No full text Scheduling of tasks based on real time requirement is a major issue in the heterogeneous multicore systemsfor micro-grid power management . Heterogeneous multicore processor schedules the serial tasks in the high performance core and parallel tasks are executed on the low performance cores. The aim of this paper is to implement a scheduling algorithm based on fuzzy logic for heterogeneous multicore processor for effective micro-grid application. Real – time tasks generally have different execution time and dead line. The main idea is to use two fuzzy logic based scheduling algorithm, first is to assign priority based on execution time and deadline of the task. Second , the task which has assigned higher priority get allotted for execution in high performance core and remaining tasks which are assigned low priority get allotted in low performance cores. The main objective of this scheduling algorithm is to increase the throughput and to improve CPU utilization there by reducing the overall power consumption of the micro-grid power management systems. Test cases with different task execution time and deadline were generated to evaluate the algorithms using MATLAB software.
FPGA-based Architecture of Direct Torque Control
No full textThis paper presents an optimized FPGA architecture of a DTC “direct torque control” drive of an induction motor. The proposed architecture is based on variable fixed point world size and the use ipcores in order to achieve higher sampling frequency which leads to reduce the electromagnetic torque and flux ripples. The hardware implementation was experimentally validated, the results shows the effectiveness of the hardware DTC drive implementation by the minimization of the torque and flux rippl
Online Self-testable Multi-core System using Dynamic Partial Reconfiguration of FPGA
No full textThis paper presents a novel and efficient method of designing an online self-testable multi-core system. Testing of a Core Under Test (CoUT) in a massively multi-core system can be carried out while the system is operational, by assigning the functionality of the CoUT to one of the non-functioning/idle and pre-tested core. The methodology presented in this paper has been implemented taking a test setup by demonstrating the Dynamic Partial Reconfiguration (DPR) feature of latest FPGAs on Zynq-7 XC702 evaluation board. The simulation results obtained from the experimental setup show that the utilization of a multi-core system can be significantly improved by effectively utilizing the idle core(s) to back up CoUT(s) for on-line test without a significant hardware overhead and test latency
Metal-Embedded SU-8 Slab Techniques for Low-Resistance Micromachined Inductors
No full textThis work presents new fabrication technique for micro power-inductors by using metal-embedded SU-8 slab techniques. This techniques used X-ray lithography to fabricate high aspect-ratio LIGA-like micro-structures in form of embedded structure in SU-8 slab and applied for inductor’s winding fabrication with aspect-ratio of 10. Thishigh-aspect ratiostructure can provide very low resistance winding but preserve small form factor and low profile. Inductors were designed as pot-core structures with8 μm-thick permalloy core and 250 μm-thick copper winding. 4-types of inductors were fabricated including 3, 5, 10 and 16 turns in the area of 1.8 mm2 to 9.5 mm2. All inductors have overall heights of 370 μm, measured inductance value in a range of 70 nH to 1.3 μH at 1 MHz and DC resistance value of 30 mΩ to 336 mΩ for 3 turns to 16 turns respectively. From this result, high aspect-ratio inductors show good results including low-resistance, high inductance, and a small form factor as expected.
Slot Loaded Capacitive fed Suspended RMSA with Meandered Ground Plane
No full textIn this paper, variations in the Capacitive fed suspended RMSA configurations have been proposed. Initially, the reference antenna consists of rectangular patch of size of (35.5 X 45.6) mm2 and a small rectangular feed patch of size of (1.4 X 4) mm2 residing on the same substrate suspended above the ground plane. Coaxial probe is used to feed the small patch which in turn excites the radiator patch electromagnetically, yielding a large impedance bandwidth (BW) of 39%, with good gain and broadside radiation pattern. By, meandering the ground plane of reference antenna with three rectangular slots, the prototype antenna is fabricated and measurement has been carried out to validate the result for compact broadband response. Later, by loading a pair of rectangular slots in the radiating patch of the reference antenna in addition to the rectangular slots in the ground plane, the prototype antenna is fabricated and measurement has been carried out to validate the result for compact dual band response
Conceptual Framework of Modelling for Malaysian Household Electrical Energy Consumption using Artificial Neural Network based on Techno-Socio Economic Approach
No full textThe residential sector was one of the contributors to the increase in the world energy consumption and CO2 emission due to the increase population, economic development, and improved living standard. Developing a reliable model of electrical energy consumption based on techno-socio economic factors was challenging since many assumptions need to be considered. Over the past decade, bottom-up approaches such as multi-linear regression, artificial neural network (ANN), and conditional demand analysis were used for developing mathematical models to investigate interrelated characteristics among techno-socio economic factors. However, the existing models mostly were focused on countries that had different socio-economic level and cultures from the developing countries of the Association of Southeast Asian Nations. Similar studies in that tropical region were very scarce and only limited for linear modelling under the conditions of techno-socio economic factors. In this study, we proposed ANN for developing a model of electrical energy consumption based on techno-socio economic factors for a tropical region, Malaysia. In order to develop the model, quantitative measurement and qualitative assessment were required. The quantitative measurement was based on the monitoring of total electrical energy consumption with a one-minute interval. In contrast, the qualitative assessment utilized a questionnaire survey to assess household characteristics based on techno-socio economic parameters. The objective of this paper was to propose a conceptual framework of the estimation model for household electrical energy consumption with the consideration of techno-socio economic factors using ANN
From Agasa Cristie to Group Image Play - Analysis of Horror Survival Game Panic Room : Escaping from the Den on Emotional Elements Development
No full textA maniac computer game genre called ‘Survival Horror Games’ is aimed for making gamers feel cathartic feeling when they escaped from the designed horror successfully. The degree of gaming quality, however, is not easy to measure. In this paper, we apply Caillois’ game playing categories and other standards to measure how a game induces the feeling of fear and other emotional experience to players. Once dominated horror survival game series called Panic Room: Escaping from the Den was chosen to analyze and evaluate with those standards as well as its narratives and subsystems. Especially the 2nd version was most welcomed to users among 4 versions thus we focused on the difference between the version 1 and the version 2 in terms of game playing and fear elements in the game content and story structure. In result, version 2 showed much more Agon and Mimicry and all other fear elements than version 1. The group image playing structure and conference/collection subsystem that were newly provided to version 2 were attributed to its success
Back-to-Back Schottky Diode from Vacuum Filtered and Chemically Reduced Graphene Oxide
No full textThis paper presents fabrication of reduced graphene oxide (rGO)/silicon (Si) back-to-back Schottky diode (BBSD) through graphene oxide (GO) thin film formation by vacuum filtration and chemical reduction of the film via ascorbic acid. In order to understand and assess the viability of these two processes, process condition and parameters were varied and analyzed. It was confirmed that the GO film thickness could be controlled by changing GO dispersion volume and concentration. Filtration of 200 ml of 0.4 ppm GO dispersion produced average film thickness of 53 nm. As for the reduction process, long duration was required to produce higher reduction degree. rGO film that underwent two times reduction at before and after transfer process with concentrated ascorbic acid gave the lowest sheet resistance of 3.58 MΩ/sq. In the final part of the paper, result of the BBSD device fabrication and current-voltage characterization were shown. The formed two rGO/Si Schottky junctions in the BBSD gave barrier height of 0.63 and 0.7 eV. The presented results confirmed the viability of fabricating rGO-based device using a simple method and without requirement of sophisticated equipment
A Wideband mm-Wave Printed Dipole Antenna for 5G Applications
No full textIn this paper, a wideband millimeter-wave (mm-Wave) printed dipole antenna is proposed to be used for fifth generation (5G) communications. The single element antenna exhibits a 36 GHz bandwidth with more than 85.71% fractional bandwidth (for S11 <-10 dB) which covers six of the 5G candidate frequencies; 24 GHz, 25 GHz, 28 GHz, 32 GHz, 38 GHz and 40 GHz. The antenna also exhibits an average gain of 5.34 dB with a compact size of 7.35 x 5.85 mm2. The antenna is further designed to be an array with eight elements and manage to increase the gain of the antenna with an average of 12.63 dB, a fractional bandwidth of 81.48% and linearly-polarized radiation pattern.