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Cell Cycle Modeling for Budding Yeast with Stochastic Simulation Algorithms
For biochemical systems, where some chemical species are represented by small numbers of molecules, discrete and stochastic approaches are more appropriate than continuous and deterministic approaches. The continuous deterministic approach using ordinary differential equations is adequate for understanding the average behavior of cells, while the discrete stochastic approach accurately captures noisy events in the growth-division cycle. Since the emergence of the stochastic simulation algorithm (SSA) by Gillespie, alternative algorithms have been developed whose goal is to improve the computational efficiency of the SSA. This paper explains and empirically compares the performance of some of these SSA alternatives on a realistic model. The budding yeast cell cycle provides an excellent example of the need for modeling stochastic effects in mathematical modeling of biochemical reactions. This paper presents a stochastic approximation of the cell cycle for budding yeast using Gillespie’s stochastic simulation algorithm. To compare the stochastic results with the average behavior, the simulation must be run thousands of times. Many of the proposed techniques to accelerate the SSA are not effective on the budding yeast problem, because of the scale of the problem or because underlying assumptions are not satisfied. A load balancing algorithm improved overall performance on a parallel supercomputer
A Human Motor Behavior Model for Direct Pointing at a Distance
Models of human motor behavior are well known as an aid in the design of user interfaces (UIs). Most current models apply primarily to desktop interaction, but with the development of non-desktop UIs, new types of motor behaviors need to be modeled. Direct Pointing at a Distance is such a motor behavior. A model of direct pointing at a distance would be particularly useful in the comparison of different interaction techniques, because the performance of such techniques is highly dependent on user strategy, making controlled studies difficult to perform. Inspired by Fitts’ law, we studied four possible models and concluded that movement time for a direct pointing task is best described as a function of the angular amplitude of movement and the angular size of the target. Contrary to Fitts’ law, our model shows that the angular size has a much larger effect on movement time than the angular amplitude and that the growth in the difficulty of the tasks is quadratic, rather then linear. We estimated the model’s parameters experimentally with a correlation coefficient of 96%
On Extrapolated Multirate Methods
In this manuscript we construct extrapolated multirate discretization methods that allow to efficiently solve problems that have components with different dynamics. This approach is suited for the time integration of multiscale ordinary and partial differential equations and provides highly accurate discretizations. We analyze the linear stability properties of the multirate explicit and linearly implicit extrapolated methods. Numerical results with multiscale ODEs illustrate the theoretical findings
Proceedings of the Third Annual Virginia Tech Center for Human-Computer Interaction Research Experience for Undergraduates (REU) Symposium
Virginia Tech's Center for Human-Computer Interaction presents the project abstracts for the REU ’08 symposium. The REU (Research Experience for Undergraduates) program provides undergraduate students from various universities with the opportunity to spend eight weeks at Virginia Tech, working with our faculty and graduate students on research projects using the state-of-the-art technology and laboratories assembled here. The REU program is sponsored by a National Science Foundation grant IIS-0552732
Accelerating Data-Serial Applications on Data-Parallel GPGPUs: A Systems Approach
The general-purpose graphics processing unit (GPGPU) continues to make significant strides in high-end computing by delivering unprecedented performance at a commodity price. However, the many-core architecture of the GPGPU currently allows only data-parallel applications to extract the full potential out of the hardware. Applications that require frequent synchronization during their execution do not experience much performance gain out of the GPGPU. This is mainly due to the lack of explicit hardware or software support for inter thread communication across the entire GPGPU chip.
In this paper, we design, implement, and evaluate a highly-efficient software barrier that synchronizes all the thread blocks running on an offloaded kernel on the GPGPU without having to transfer execution control back to the host processor. We show that our custom software barrier achieves a three-fold performance improvement over the existing approach, i.e., synchronization via the host processor.
To illustrate the aforementioned performance benefit, we parallelize a data-serial application, specifically an optimal sequence-search algorithm called Smith-Waterman (SWat), that requires frequent barrier synchronization across the many cores of the nVIDIA GeForce GTX 280 GPGPU. Our parallelization consists of a suite of optimization techniques — optimal data layout, coalesced memory accesses, and blocked data decomposition. Then, when coupled with our custom software-barrier implementation, we achieve nearly a nine-fold speed-up over the serial implementation of SWat. We also show that our solution delivers 25 faster on-chip execution than the na¨ıve implementation
Studying Group Decision Making in Affinity Diagramming
Affinity diagramming is a commonly used contextual design practice for which many tools have been developed. However, experts and novices alike eschew tool use, instead using traditional paper and whiteboard methods. This paper presents observations of traditional affinity diagramming sessions, focusing on three areas of consideration—shared awareness, cognitive offloading, and understanding, organizing and searching—that are important for collaborative tools. Specific design requirements for each of these three areas are described
Multilayered Heterogeneous Parallelism Applied to Atmospheric Constituent Transport Simulation
Heterogeneous multicore chipsets with many levels of parallelism are becoming increasingly common in high-performance computing systems. Effective use of parallelism in these new chipsets constitutes the challenge facing a new generation of large scale scientific computing applications. This study examines methods for improving the performance of two-dimensional and three-dimensional atmospheric constituent transport simulation on the Cell Broadband Engine Architecture (CBEA). A function offloading approach is used in a 2D transport module, and a vector stream processing approach is used in a 3D transport module. Two methods for transferring incontiguous data between main memory and accelerator local storage are compared. By leveraging the heterogeneous parallelism of the CBEA, the 3D transport module achieves performance comparable to two nodes of an IBM BlueGene/P, or eight Intel Xeon cores, on a single PowerXCell 8i chip. Module performance on two CBEA systems, an IBM BlueGene/P, and an eight-core shared-memory Intel Xeon workstation are given
Impact of Network Sharing in Multi-core Architectures
As commodity components continue to dominate the realm of high-end computing, two hardware trends have emerged as major contributors to this - high-speed networking technologies and multi-core architectures. Communication middleware such as the Message Passing Interface (MPI) use the network technology for communicating between processes that reside on different physical nodes while using shared memory for communicating between processes on different cores within the same node. Thus, two conflicting possibilities arise: (i) with the advent of multi-core architectures, the number of processes that reside on the same physical node and hence share the same physical network can potentially increase significantly resulting in {\em increased} network usage and (ii) given the increase in intra-node shared-memory communication for processes residing on the same node, the network usage can potentially {\em reduce} significantly.
In this paper, we address these two conflicting possibilities and study the behavior of network usage in multi-core environments with sample scientific applications. Specifically, we analyze trends that result in increase or decrease of network usage and derive insights on application performance based on these. We also study the sharing of different resources in the system in multi-core environments and identify the contribution of the network in this mix. Finally, we study different process allocation strategies and analyze their impact on such network sharing
A Pluggable Framework for Lightweight Task Offloading in Parallel and Distributed Computing
Multicore processors have quickly become ubiquitous in supercomputing, cluster computing, datacenter computing, and even personal computing. Software advances, however, continue to lag behind. In the past, software designers could simply rely on clock-speed increases to improve the performance of their software. With clock speeds now stagnant, software designers need to tap into the increased horsepower of multiple cores in a processor by creating software artifacts that support parallelism. Rather than forcing designers to write such software artifacts from scratch, we propose a pluggable framework that designers can reuse for lightweight task offloading in a parallel computing environment of multiple cores, whether those cores be colocated on a processor within a compute node, between compute nodes in a tightly-coupled system like a supercomputer, or between compute nodes in a loosely-coupled one like a cloud computer. To demonstrate the efï¬cacy of our framework, we use the framework to implement lightweight task offloading (or software acceleration) for a popular parallel sequence-search application called mpiBLAST. Our experimental results on a 9-node, 36-core AMD Opteron cluster show that using mpiBLAST with our pluggable framework results in a 205% speed-up
GridWeaver: A Fully-Automatic System for Microarray Image Analysis Using Fast Fourier Transforms
Experiments using microarray technology generate large amounts
of image data that are used in the analysis of genetic function.
An important stage in the analysis is the determination of
relative intensities of spots on the images generated.
This paper presents GridWeaver,
a program that reads in images from a microarray experiment,
automatically locates subgrids and spots in the images,
and then determines the spot
intensities needed in the analysis of gene function.
Automatic gridding is performed by running
Fast Fourier Transforms on pixel intensity sums.
Tests on several data sets show that the program responds
well even on images that have significant noise,
both random and systemic