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The Principles of John Dewey\u27s My Pedagogic Creed and its Apllication to Intercultural Issues of Migrant Students
No full textSkills Development in Hydrologic Sciences for Cohorts of Graduate Students from Morocco, Egypt, Türkiye, and Indonesia
Full text linkIn developing countries in Africa and Asia, meeting challenges of water scarcity and pollution has often been hampered by shortcomings in higher education, including insufficient research productivity and funding, lack of opportunity for university graduates, and a mismatch between university activities and societal needs. To address these issues, we developed novel programs integrating technical instruction and preparation for professional practice in hydrology for cohorts of graduate students from Morocco and Egypt (2012–2013) and from Türkiye and Indonesia (2013–2014). Students participated in an initial online course and a follow-up workshop featuring geographic information systems (GIS), remote sensing, and hydrologic modeling with internet-based data sets. Field activities in the USA (first cohort) and in the students’ home countries (second cohort) included stream gauging, measurement of water levels in wells, water sampling, and measurement of hydrochemical parameters. A subsequent online course focused on research ethics, preparing proposals and publications, and presenting findings to technical audiences and the public, culminating in presentations at conferences in the USA. Participants mentored other students at their home institutions and at K-12 schools in Türkiye and Indonesia. Participant feedback during and after the programs tended to be strongly positive, and participants have continued to engage with project leaders and mentor students in their home countries and the USA. Our modular, hybrid approach offers a template for students in hydrology and related fields to develop relevant skills and engage internationally
Dice: An Examination of Online Dating and Neuroqueer Identity in New Girl
Full text linkThis paper explores the representation of neurodiversity in popular media, with a specific focus on the television show New Girl. Through a critical analysis of Season 4, Episode 2 ( Dice ), I examine the episode alongside academic and online discussions surrounding female Autistic representation, dating while neurodivergent, and how the character Jessica Day (played by Zooey Deschanel) is often interpreted as Autistic by fan communities. The analysis highlights the pressure on Autistic individuals—both fictional and real—to adopt neurotypical behaviors for the comfort of others, particularly in online dating contexts. I also explore the importance of fan-created content in shaping conversations around character identities, whether canonical or headcanons. The paper argues that further research is needed on neurodivergent identity performance in dating apps. Finally, I assert the need for more attention to how sitcoms influence societal attitudes toward minoritized groups and propose a shift away from a binary of good versus bad representation, advocating instead for a more nuanced understanding of representation as either helpful and authentic or superficial and performative
Assessing the Effectiveness and Value of Information on Southern Illinois University Carbondale\u27s Center for Education\u27s (CIE) Website
Full text linkAbstract
The internationalization of higher education has grown significantly over the past three decades, with international students playing a crucial role in fostering academic, cultural, and economic development in host countries. University websites are pivotal in supporting international student mobility, serving as primary sources of information during the decision-making process. This study aims to evaluate the effectiveness of the Center for International Education (CIE) website at Southern Illinois University Carbondale (SIUC) in disseminating information and providing a positive user experience for international students.
The study examines factors influencing website usability, such as content clarity, website architecture, user interface design, and accessibility. Using a mixed-methods approach, current international students at SIUC were surveyed to assess their perceptions of the CIE website’s functionality and their experiences in accessing key information. Findings from the study reveal critical areas for improvement, including content visibility, ease of navigation, and the provision of multilingual support.
The results underscore the importance of user-centric website design and the inclusion of features like virtual tours, interactive tools, and mobile-friendly interfaces to enhance usability. By addressing the challenges faced by international students, the study provides actionable recommendations to optimize the CIE website’s performance, improve the dissemination of information, and foster a more inclusive and supportive online environment. These enhancements are vital for attracting, retaining, and supporting international students, ultimately contributing to the global reputation and success of the university
Effectiveness of the Online Leave No Trace 101 Course
Full text linkThis study examined the effectiveness of the Leave No Trace Online 101 course in increasing participants\u27 knowledge and of Leave No Trace principles. Using a pre- and post-survey design, the study assessed changes in understanding through a combination of self-assessment and objective knowledge-based questions. The research aimed to determine whether the course successfully enhances environmental stewardship knowledge. Findings will inform future improvements to Leave No Trace educational programs and contribute to broader efforts in promoting responsible outdoor recreation
REDUCING TRANSISTOR COUNT IN CMOS LOGIC DESIGN THROUGH CLUSTERING, SUPERCLUSTERING, AND SOP SPLITTING
No full textTransistor-level synthesis is crucial for designing digital circuits because it allows for precise control over the behavior and performance of the circuit at the most fundamental level. This detailed design approach enables optimization of power consumption, speed, and area, leading to highly efficient and compact circuits. By directly manipulating the transistors, designers can achieve tailored solutions that meet specific performance requirements and constraints, which is essential for advanced applications such as high-speed processors, low-power devices, and complex integrated systems. Moreover, transistor-level synthesis helps identify and mitigate potential issues like signal integrity problems and parasitic effects early in the design process, ensuring robust and reliable circuit operation. The first contribution of this dissertation, presented in Chapter 2, is the proposal of a novel transistor-level synthesis method designed to minimize the number of transistors needed to implement a digital circuit. In contrast with traditional standard cell design methods or transistor-level synthesis methods based on “complex” gates or “super” gates, our method considers multioutput clusters as the basic resynthesis unit. Our tool takes any gate-level circuit netlist as input and divides it into several clusters of user-controlled size. For each output of a cluster, a simplified sum of product (SOP) expression is obtained, and all such expressions are jointly minimized for the cluster using the MOTO-X multi-output transistor-level synthesis tool. Since the polarity of the cluster outputs affects the number of transistors required for the multi-output transistor network, we obtain a minimized transistor count for each output polarity combination (“opc”) of the cluster outputs. By choosing the lowest transistor count implementation of each cluster, we identify a suitable transistor cost implementation for the complete circuit. Experimental results indicate average transistor count reductions compared to the ABC synthesis tool of 7.39%, 0.27%, 6.15%, and 4.24% for the ISCAS’85, LGSynth’89, LGSynth’91 and ITC’99 benchmark suites, respectively. The second contribution of this dissertation, presented in Chapter 3, introduces the concept of ‘superclusters.’ This approach moves beyond optimizing the opc implementation of individual clusters, by considering groups of related clusters. By minimizing input-output inversion costs and selecting optimal output polarity combinations for each cluster within the supercluster, the method achieves a significantly reduced overall transistor count for the circuit implementation. Experimental results demonstrate average transistor count reductions of 9.95%, 6.57%, 10.50%, 9.76%, and 13.09% compared to the ABC synthesis tool for the ISCAS’85, LGSynth’89, LGSynth’91, ITC’99, and EPFL’15 benchmark suites, respectively. The final contribution of this dissertation, presented in Chapter 4, proposes a novel transistor-level synthesis method based on SOP splitting to minimize the number of transistors required for digital circuit implementation. Unlike traditional boolean function factoring heuristics, our approach treats multi-output clusters as the fundamental units for resynthesis, then splits the SOP function of the output with user-defined constraints. These expressions are then collectively minimized for each cluster using the MOTO-X multi-output transistor-level synthesis tool. Additionally, we use superclustering technique of Chapter 3 to optimize groups of related clusters together to reduce transistor count further. Experimental results show that our method achieves average transistor count reductions of 8.59%, 1.93%, 6.22%, and 7.76% compared to the ABC synthesis tool for the ISCAS’85, LGSynth’89, LGSynth’91, and ITC’99 benchmark suites, respectively. Additionally in Chapter 5, we demonstrate the power and delay analysis results of circuit clusters obtained by our proposed method versus ABC synthesis tool’s optimized circuits. Highlighting the potential of our methodology for optimizing integrated circuits at the transistor-level while concurrently delivering enhancements in both power efficiency and delay
Accelerating Spatial Query Operations
No full textPolygon overlay operations are used for various purposes such as GIS searches and queries, VLSI and basic geometric operations of intersection, union and difference. There have been recent research articles presenting algorithms using the GPU to perform line segment intersection for geometric operations. This paper presents two parallel algorithms implemented on the GPU that focus on the active list portion of the traditional serial plane sweep algorithm. The first algorithm uses a single block of threads to simulate the active list data structure in hardware; this algorithm is slow due to GPU thread block size limitations and synchronization points, but demonstrates favorable time complexity. The second algorithm uses dynamic parallelism to remove synchronization and scales to utilize available GPU hardware (single GPU). Experiments on both synthetic and real world data sets are performed. The results show improvement in execution time with respect to recent algorithms, and low memory usage compared to recent algorithms. Speedups of up to 38.8 over the serial sweep line algorithm on real world data are achieved