36967 research outputs found
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PDP Sustainers with Reduced Current Stress and Sensitivity to Parasitic and Distributed Components
No full text[[abstract]]This paper presents three improved plasma display panel (PDP) sustainers with reduced current stress and sensitivity to parasitic and distributed components. In the paper, a useful cell equivalent circuit model is first introduced, and a widely used sustainer is then reviewed, on which three improved ones are proposed. The proposed sustainers can reduce currents through switches and sensitivity to parasitic and distributed components along its conduction paths. Derivation and operating principle of the proposed sustainers are addressed in detail. In addition, their related gaseous discharge mechanism in PDP cells is also presented. Hardware measurements have verified the feasibility of the proposed sustainers.[[fileno]]2030197030146[[department]]電機工程學
Single-Stage, Current-Fed Push-Pull Electronic Ballast with Power-Factor Correction
No full text[[abstract]]This paper presents the analysis, design and practical consideration of a single-stage, current-fed push-pull electronic ballast with power factor correction. The power stage of the ballast is derived from combining a buck-boost converter and a current-fed push-pull parallel-resonant series-loaded inverter. The buck-boost semi-stage working in the discontinuous conduction mode functions as a power factor corrector and the inverter semi-stage operated above resonance is employed to ballast the lamp. The proposed electronic ballast can provide isolation, and the driving signals can be applied to the gates directly without the need of galvanic isolation devices. Computer simulation results and experimental measurements are used to verify the theoretical prediction and analytical discussion.[[fileno]]2030197030165[[department]]電機工程學
A Systematic and Unified Approach to Modeling PWM Dc/Dc Converters Using the Layer Scheme
No full text[[abstract]]This paper presents a systematic and unified approach to modeling PWM DC/DC power converters using the layer scheme. With the layer scheme, typical PWM power converters, such as buck-boost, Cuk, Zeta and Sepic, can be derived from the two basic power converter trees, buck and boost. The small-signal models of these power converters can, therefore, be readily derived in terms of h-parameter (for buck family) and g-parameter (for boost family). Using the proposed approach can help to yield highly related dynamic models of the power converters in a family. This merit has made the proposed modeling method become uniquely valuable.[[fileno]]2030197030190[[department]]電機工程學
A Systematic Illustration of the Applications of Grafted Converter Trees
No full text[[abstract]]This paper presents a systematic illustration of the applications of grafted converter frees (GCTs) developed by using graft technique. The technique is reviewed on which the four basic types of grafted switches and their degenerated configurations are introduced. The GCTs for various applications are, consequently, illustrated in the paper. In addition, the control strategies being suitable for the GCTs are addressed as well. The controls include pulse-width modulation and frequency modulation. It has been shown that GCTs substituted for their conventional multistate converters can obtain the merits of compact size, high reliability and simple driver design.[[fileno]]2030197030191[[department]]電機工程學
Is 3D integration an opportunity or just a hype?
No full text[[abstract]]Three-dimensional (3D) integration using through silicon via (TSV) is an emerging technology for integrated circuit designs. 3D integration technology provides numerous opportunities to designers looking for more cost-effective system chip solutions. In addition to stacking homogeneous memory dies, 3D integration technology supports heterogeneous integration of memories, logic, sensors, etc. It eases the interconnect performance limitation, provides higher functionality, results in small form factor, etc. On the other hand, there are challenges that should be overcome before volume production of TSV-based 3D ICs becomes possible, e.g., technological challenges, yield and test challenges, thermal and power challenges, infrastructure challenges, etc.[[fileno]]2030108030209[[department]]電機工程學
A low-cost wireless interface with no external antenna and crystal oscillator for cm-range contactless testing
No full text[[abstract]]This work presents a low-cost wireless system design that serves as an interface to support the SoC with contactless testability feature. The communication hierarchy includes PHY, MAC, data exchange, and test wrapper functions. The wireless does not require external antennae and crystal reference, and therefore minimize the setup cost. The embedded all-digital timing generation achieves robust performance in the noisy environment. The whole wireless system occupies a small area. In a 0.18 mu m device-under-test, the active area of wireless front-end is 0.14mm(2) and the gate count for digital processing is 112K. The maximum energy efficiency for uplink is 1.1nJ/bit and for downlink is 2.9nJ/bit when the wireless distance is set around 1 cm. The prototype system includes test equipment and an SoC as the device-under-test. The SoC integrating logic, memory, and analog plug-in modules can be contactlessly tested. It is a low-cost platform controlled by a simple hand-held computer.[[fileno]]2030108030219[[department]]電機工程學
Optical Phase Shifters Based on Micro-Electro- Mechanical-System Actuated Deformable Silicon Wire Waveguides
No full text[[fileno]]2030180030043[[department]]電機工程學
Functional transcranial photoacoustic micro-imaging of mouse cerebrovascular crosssection and hemoglobin oxygenation changes during forepaw electrical stimulation
Get PDF[[abstract]]In this study, we report on using a 50-MHz functional photoacoustic microscopy (PAM) to transcranially image the cross-section and hemoglobin oxygenation (SO2) changes of single mouse cortical vessels in response to left forepaw electrical stimulation. Three difference levels of the cortical vessels (i.e., with different-sized diameters of 350, 100 and 55 μm) on activated regions were marked to measure their functional cross-section and SO2 changes as a function of time. Electrical stimulation of the mouse left forelimb was applied to evoke functional changes in vascular dynamics of the mouse somatosensory cortex. The applied current pulses were with a pulse frequency of 3 Hz, pulse duration of 0.2 ms, and pulse amplitude of 2 mA. The cerebrovascular cross-section changes, which indicate changes in cerebral blood volume (CBV), were probed by images acquired at 570 nm, a hemoglobin isosbestic point, while SO2 changes were monitored by the derivatives of 560-nm images normalized to 570-nm ones. The results show that vessel diameter and SO2 were significantly dilated and increased when compared with those of the controlled ones. In summary, the PAM shows its promise as a new imaging modality for transcranially functional quantification of single vessel diameter (i.e., CBV) and SO2 changes without any contrast agents applied during stimulation.[[fileno]]2030143030056[[department]]電機工程學
Gold-nanorod based ultrasound contrast enhanced imaging for real-time monitoring focused ultrasound induced blood-brain-barrier opening
No full text[[fileno]]2030143030060[[department]]電機工程學