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スポーツ・コミットメント形成モデルの構築 －ソーシャルサポートの授受と競技者アイデンティティーの関連を基軸として－
Get PDF九州工業大学博士学位論文（要旨） 学位記番号:生工博甲第225号 学位授与年月日:平成26年9月26
Development and Qualification of an FPGA-Based Multi-Processor System-on-Chip On-Board Computer for LEO Satellites
Get PDF九州工業大学博士学位論文 学位記番号:工博甲第374号 学位授与年月日:平成26年9月26日Chapter 1: Introduction||Chapter 2: Background and Literature Review||Chapter 3: Multi-Processor System-on-Chip On-Borad Computer Design||Chapter 4: Space and Time Redundancy Trade-offs||Chapter 5: Radiation and Fault Injection Testing||Chapter 6: Thermal Vacuum Testing||Chapter 7: Results and Discussion||Chapter 8: Conclusion and Future Perspectives||ReferencesDeveloping small satellites for scientific and commercial purposes is emerging rapidly in the last decade. The future is still expected to carry more challenging services and designs to fulfill the growing needs for space based services. Nevertheless, there exists a big challenge in developing cost effective and highly efficient small satellites yet with accepted reliability and power consumption that is adequate to the mission capabilities. This challenge mandates the use of the recent developments in digital design techniques and technologies to strike the required balance between the four basic parameters: 1) Cost, 2) Performance, 3) Reliability and 4) Power consumption. This balance becomes even more stringent and harder to
reach when the satellite mass reduces significantly. Mass reduction puts strict constraints on the power system in terms of the solar panels and the batteries. That fact creates the need to miniaturize the design of the subsystems as much as possible which can be viewed as the fifth parameter in the design balance dilemma.
At Kyuhsu Institute of Technology-Japan we are investigating the use of SRAMbased Field Programmable Gate Arrays (FPGA) in building: 1) High performance, 2)Low cost, 3) Moderate power consumption and 4) Highly reliable Muti-Processor System-on-Chip (MPSoC) On-Board Computers (OBC) for future space missions and applications. This research tries to investigate how commercial grade SRAMbased FPGAs would perform in space and how to mitigate them against the space environment. Our methodology to answer that question depended on following formal design procedure for the OBC according to the space environment requirements then qualifying the design through extensive testing. We developed the
MPSoC OBC with 4 complete embedded processor systems. The Inter Processor Communication (IPC) takes place through hardware First-In-First-Out (FIFO) mailboxes. One processor acts as the system master controller which monitors the operation and controls the reset and restore of the system in case of faults and the other three processors form Triple Modular Redundancy (TMR) fault tolerance architecture with each other. We used Dynamic Partial Reconfiguration (DPR) in scrubbing the configuration memory frames and correcting the faults that might exist. The system is implemented using a Virtex-5 LX50 commercial grade FPGA from Xilinx. The research also qualifies the design in the ground-simulated space environment conditions. We tested the implemented MPSoC OBC in Thermal Vacuum Chambers (TVC) at the Center of Nano-Satellite Testing (CeNT) at Kyushu Institute of Technology. Also we irradiated the design with proton accelerated beam at 65 MeV with fluxes of 10e06 and 3e06 particle/cm2/sec at the Takasaki Advanced Radiation Research Institute (TARRI).
The TVC test results showed that the FPGA design exceeded the limits of normal operation for the commercial grade package at about 105 C°. Therefore, we mitigated the package using: 1) heat sink, 2) dynamic temperature management through operating frequency reduction from 100 MHz to 50 MHz and 3) reconfiguration to reduce the number of working processors to 2 instead of 4 by replacing the spaceredundancy TMR with time-redundancy TMR during the sunlight section of the orbit. The mitigation proved to be efficient and it even reduced the temperature from 105 C° to about 66 C° when the heat sink, frequency reduction, and reconfiguration techniques were used together.
The radiation and the fault injection tests showed that mitigating the FPGA configuration frames through scrubbing are efficient when Single Bit Upsets (SBU) are recorded. Multiple Bit Upsets (MBU) are not well mitigated using the scrubbing with Single Error Correction Double Error Detection (SECDED) technique and the FPGA needs to be totally reset and reloaded when MBUs are detected in its configuration frames. However, as MBUs occurrence in space is very seldom and rare compared to SBUs, we consider that SECDED scrubbing is very efficient in decreasing the soft error rate and increasing the reliability of having error-free bitstreams. The reliability was proven to be at 0.9999 when the scrubbing rate was continuous at a period of 7.1 msec between complete scans of the FPGA bitstream. In the proton radiation tests we managed to develop a new technique to estimate the static cross section using internal scrubbing only without using external monitoring, control and scrubbing device. Fault injection was used to estimate the dynamic cross section in a cost effective alternative for estimating it through radiation test.
The research proved through detailed testing that the 65 nm commercial grade SRAM-based FPGA can be used in future space missions. The MPSoC OBC design achieved an adequate balance between the performance, power, mass, and reliability requirements. Extensive testing and applying carefully crafted mitigation techniques were the key points to verify and validate the MPSoC OBC design. In-orbit validation through a scientific demonstration mission would be the next step for the future research
Fabrication of Yttrium Phosphate Microcapsules by an Emulsion Route for in situ Cancer Radiotherapy
Get PDFRadiotherapy is a novel, non-invasive cancer treatment. Radioactive hollow microspheres, i.e., microcapsules, are attractive for in situ cancer radiotherapy because they can effectively reach tumors without settling in blood vessels. In particular, microcapsules 20-30 µm in size are expected to exhibit not only a radiotherapy effect but also embolization that blocks the nutrient supply to cancer cells. β-ray irradiation is the most suitable source for in situ radiotherapy because of its moderate range. Several kinds of β-emitting yttria (Y2O3) microcapsules have therefore been developed. Yttrium phosphate (YPO4) should have a longer irradiation effect than that of Y2O3 because the half-life of 31P (14.3days) is longer than that of 90Y (64.1 hours). However, the preparation of YPO4 microcapsules has not been reported to date. In the present study, YPO4 microcapsules were fabricated using a water/oil (W/O) emulsion prepared by first dispersing a YPO4 sol into toluene containing a surfactant, with mechanical homogenization. The emulsion was then added into butanol to dehydrate the water phase and precipitate microcapsules. These were then heat-treated to improve their mechanical strength and chemical stability. Microcapsule fragility at low YPO4 sol concentrations in the water phase was attributed to the thinness of the microcapsule shell. The size of the microcapsules decreased with increasing emulsification speed. The chemical stability of the prepared microcapsules is similar to those of previously reported YPO4 and Y2O3 microspheres in weakly acidic conditions. Thus, little leakage of radioactive species into nearby healthy tissues is expected. The obtained microcapsules are expected to be highly effective for cancer radiotherapy
電子デバイス製造における省薬液ウエットプロセス技術に関する研究
Get PDF九州工業大学博士学位論文 学位記番号:生工博甲第218号 学位授与年月日:平成26年3月25日第1章 序章||第2章 電解水の製造方法とその効果||第3章 音波励起溶存酸素水の性質と洗浄効果||第4章 音波励起溶存水素水の性質と洗浄効果||第5章 音波励起アルカリ添加オゾン水の性質と洗浄効果||第6章 ディスプレイ用インクジェット塗布技術の開発||第7章 低分子EL 材料のナノ粒子化による可溶化インクの形成||第8章 結
母集団を動的に分割統合する遺伝的アルゴリズムの提案とその応用によるリアルタイム最適軌道生成
Get PDF九州工業大学博士学位論文 学位記番号:工博甲第360号 学位授与年月日:平成26年3月25日第1章 緒論||第2章 遺伝的アルゴリズムを用いた最適軌道生成||第3章 母集団を動的に分割統合する動的遺伝的アルゴリズムの提案||第4章 FPGAを用いたオンボードリアルタイム計算の実現性検証||第5章 結
ソーラーパネルに作用する風荷重の研究
Get PDF九州工業大学博士学位論文 学位記番号:工博甲第372号 学位授与年月日:平成26年9月26日第1章 序論||第2章 メガソーラの現状と既往の研究||第3章 実験及び解析の概要||第4章 実験及び解析の結果||第5章 任意配置アレイにおける設計用風力係数分布の推定式の開発と合理化設計の一般化||第6章 荷重条件及び下部工構造形式の変化に伴う基礎工工事費のケーススタディ||第7章 結論||参考文献||謝