Computing and Informatics (E-Journal - Institute of Informatics, SAS, Bratislava)
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    1506 research outputs found

    Construction of Hardware Components for the Internet of Services

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    In this paper we focus on a hardware realization of web services (WS) and their integration within the service-oriented architecture (SOA). Previous approaches to the implementation of network-enabled services in hardware covered only very specific types of applications and were platform-dependent. Our contribution is a generic framework where heterogeneous everyday objects are enhanced with appropriate hardware extensions. This turns them into intelligent electronic devices that can sense the environment as well as interact with it, exposing their functionality via public WS interface. An integration scheme is introduced to allow the augmented objects to be used within highly distributed enterprise applications. Each web service is mapped to a functionally equivalent Open Services Gateway initiative (OSGi) service so that it can be dynamically added to the pool of elementary services accessible within the enterprise service bus (ESB). Our approach is exemplified by several web services for environment monitoring, mechanical control and visual inspection, all implemented in a reconfigurable hardware. A case study of integrating and using such services is also presented

    Fast Hardware Implementations of Static P Systems

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    In this article we present a simulator of non-deterministic static P systems using Field Programmable Gate Array (FPGA) technology. Its major feature is a high performance, achieving a constant processing time for each transition. Our approach is based on representing all possible applications as words of some regular context-free language. Then, using formal power series it is possible to obtain the number of possibilities and select one of them following a uniform distribution, in a fair and non-deterministic way. According to these ideas, we yield an implementation whose results show an important speed-up, with a strong independence from the size of the P system

    Functional Testing Using Object WorkFlow Nets

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    The main purpose of this paper is to present a new formal definition that can be used for modeling functional test. Initially, WorkFlow nets are used to represent the main functional requirement of the software. Next, Object WorkFlow nets derived from WorkFlow nets and object Petri nets are used to formally specify the test models of object oriented software functionalities to be used. In particular, the proposed models allow for the addition of complex data structure specifications as well as complex control specifications. The dynamic execution of functional testing models, when considering a specific software architecture, is given by the instantiation of a testing class associated with the tested functionality. An example of execution of functional testing corresponding to the "Withdrawal Operation" of a bank ATM machine is presented, as well as a comparative study based on a more traditional UML modeling approach

    Concurrent Generation of Pseudo Random Numbers with LFSR of Fibonacci and Galois Type

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    We have considered implementation of parallel test pattern generator based on a linear feedback shift register (LFSR) with multiple outputs used as a building block in built-in-self-test (BIST) design within SoC. The proposed design can drive several circuits under test (CUT) simultaneously. The mathematical procedure for concurrent pseudo random number (PRN) generation is described. We have implemented LFSRs that generate two and three PRNs in FPGA and ASIC technology. The design was tested at the operating frequency of 400 MHz. Performance which relate to silicon area, dynamic power consumption and speed of operation were estimated. Synopsis Design Compiler and IHP's 130 nm CMOS ASIC design kit were used for synthesis, routing and mapping of LFSR design. Total silicon area of the LFSR with three parallel outputs and polynomial of degree 32, is 0.012 mm2, and dynamic power consumption is less than 1.3 mW. Obtained results indicate that the area overhead and power consumption are small enough and proportional to the degree of feedback polynomial

    Eliciting the End-to-End Behavior of SOA Applications in Clouds

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    Availability and performance are key issues in SOA cloud applications. Those applications can be represented as a graph spanning multiple Cloud and on-premises environments, forming a very complex computing system that supports increasing numbers and types of users, business transactions, and usage scenarios. In order to rapidly find, predict, and proactively prevent root causes of issues, such as performance degradations and runtime errors, we developed a monitoring solution which is able to elicit the end-to-end behavior of those applications. We insert lightweight components into SOA frameworks and clients thereby keeping the monitoring impact minimal. Monitoring data collected from call chains is used to assist in issues related to performance, errors and alerts, as well as business and IT transactions

    Multi-Agent Based Modelling of an Endogenous-Money Economy

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    We present an agent-based model of a simple endogenous-money economy. The model simulates agents representing individual persons who can work, consume, invent new products and related production technologies, apply for a loan from the bank and start up a business. Through the interaction of persons with the firms, we simulate the production of goods, consumption and labour market. In order to achieve a significant level of realism of the simulations, the firms are modelled as adaptive agents using an effective reinforcement learning approach in continuous space. This setting allows us to explore how an endogenous-money economy can be built up from scratch, as an emergent property of actions and interactions among heterogeneous agents once money is injected into a non-monetary self-production (or barter) economy. In the paper, we first empirically investigate the learning capability of the firm agents. Then, we discuss the results of some computational experiments under different significant scenarios

    Towards a Transformation Approach of Timed UML MARTE Specifications for Observer-Based Formal Verification

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    Modeling timing constraints of distributed systems and multi-clock electronic systems aims to describe different time requirements aspects at a higher abstraction level. An important aspect is the logical time of the behavior of these systems. To model the time requirements, a specification language with multiple clock domains called Clock Constraint Specification Language (CCSL) has been introduced, in order to enrich the formalisms of existing modeling tools and also to facilitate the description and analysis of temporal constraints. Once the software has been modeled, the difficulty lies in both expressing the relevant properties and verifying them formally. For that purpose formal transformation techniques must be introduced. However, it remains difficult to exploit initial models as such, and to integrate them into a formal verification process. This paper introduces a methodology and the original tool chain for exploiting UML MARTE models enriched with CCSL specification. These will be integrated together with a range of tools for expressing and verifying time constraints. We propose a more general translation approach that verifies not only CCSL constraints implementations but also properties of the complete model including all the functional components. We evaluate our approach with a case study

    Acronym-Expansion Disambiguation for Intelligent Processing of Enterprise Information

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    An acronym is an abbreviation of several words in such a way that the abbreviation itself forms a pronounceable word. Acronyms occur frequently throughout various documents, especially those of a technical nature, for example, research papers and patents. While these acronyms can enhance document readability, in a variety of fields, they have a negative effect on business intelligence. To resolve this problem, we propose a method of acronym-expansion disambiguation to collect high-quality enterprise information. In experimental evaluations, we demonstrate its efficiency through the use of objective comparisons

    Impact of Software Fault Tolerance to Fault Effects in OS-Driven RT Systems

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    Real-time kernels are often utilized to simplify the design of embedded time/safety-critical applications. However, embedded systems are sensitive to transient and other faults, each of which can lead to various errors at various system levels and can potentially result in system failure. In existing works, the real-time kernels sensitivity to transient SEU errors was studied only with the goal to classify SEU impacts to system behavior. In this paper, the study is extended to permanent faults being injected into the persistent program (firmware) memory and into the volatile data memory. Moreover, it is studied there how the sensitivity is affected if combination of software fault-tolerant techniques is built into various levels of the system. On the experimental basis, it is shown that some fault impacts are difficult to be softened by common fault-tolerant techniques

    Improving Real-Time Data Dissemination Performance by Multi Path Data Scheduling in Data Grids

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    The performance of data grids for data intensive, real-time applications is highly dependent on the data dissemination algorithm employed in the system. Motivated by this fact, this study first formally defines the real-time splittable data dissemination problem (RTS/DDP) where data transfer requests can be routed over multiple paths to maximize the number of data transfers to be completed before their deadlines. Since RTS/DDP is proved to be NP-hard, four different heuristic algorithms, namely kSP/ESMP, kSP/BSMP, kDP/ESMP, and kDP/BSMP are proposed. The performance of these heuristic algorithms is analyzed through an extensive set of data grid system simulation scenarios. The simulation results reveal that a performance increase up to 8 % as compared to a very competitive single path data dissemination algorithm is possible

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    Computing and Informatics (E-Journal - Institute of Informatics, SAS, Bratislava)
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