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On higher order noise immune perceptrons
This paper details a systematic method for significantly enhancing the noise margins of very fast threshold gates. The method is based on adding nonlinear terms determined from the Boolean form of the linearly separable (threshold) function to be implemented. It follows that linearly separable functions can be computed with high noise immunity by higher order perceptrons. Simulation results support our theoretical claims. Finally, two methods for drastically reducing the dissipated power of such higher order perceptron gates down to <50%, and respectively <10 % are suggested. Index terms: threshold logic, threshold gates, VLSI design, noise immunity.
Grand Challenges of Nanoelectronics and Possible Architectural Solutions: What Do Shannon, von Neumann, Kolmogorov, and Feynman Have to do with Moore
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