1,721,255 research outputs found
Analog VLSI Implementation of Artificial Neural Networks with Supervised On-chip Learning
No full textAnalog VLSI on-chip learning Neural Networks represent a mature technology for a large number of
applications involving industrial as well as consumer appliances. This is particularly the case when low power
consumption, small size and/or very high speed are required. This approach exploits the computational features
of Neural Networks, the implementation efficiency of analog VLSI circuits and the adaptation capabilities of the
on-chip learning feedback schema.
Many experimental chips and microelectronic implementations have been reported in the literature based on
the research carried out over the last few years by several research groups. The author presents and discusses the
motivations, the system and circuit issues, the design methodology as well as the limitations of this kind of approach.
Attention is focused on supervised learning algorithms because of their reliability and popularity within the neural
network research community. In particular, the Back Propagation and Weight Perturbation learning algorithms are
introduced and reviewed with respect to their analog VLSI implementation.
Finally, the author also reviews and compares the main results reported in the literature, highlighting the efficiency
and the reliability of the on-chip implementation of these algorithms
Smart adaptive systems on Silicon
No full textIntelligent/smart systems have become common practice in many engineering applications. On the other hand, current low cost standard CMOS technology (and future foreseeable developments) makes available enormous potentialities. The next breakthrough will be the design and development of "smart adaptive systems on silicon" i.e. very power and highly size efficient complete systems (i.e. sensing, computing and "actuating" actions) with intelligence on board on a single silicon die. Smart adaptive systems on silicon will be able to "adapt" autonomously to the changing environment and will be able to implement "intelligent" behaviour and both perceptual and cognitive tasks. At last, they will communicate through wireless channels, they will be battery supplied or remote powered (via inductive coupling) and they will be ubiquitous in our every day life. Although many books deal with research and engineering topics (i.e. algorithms, technology, implementations, etc.) few of them try to bridge the gap between them and to address the issues related to feasibility, reliability and applications. Smart Adaptive Systems on Silicon, though not exhaustive, tries to fill this gap and to give answers mainly to the feasibility and reliability issues. Smart Adaptive Systems on Silicon mainly focuses on the analog and mixed mode implementation on silicon because this approach is amenable of achieving impressive energy and size efficiency. Moreover, analog systems can be more easily interfaced with sensing and actuating devices
Analog CMOS current mode primitives for feed-forward neural networks
No full textThe CMOS circuit implementation of the feed forward neural primitives of a generic Multi Layer Perceptron network is presented. Basically our approach is based on current mode computation and is aimed at a low power/low voltage circuit implementation; moreover, it is easily scalable to implement network of any size. Experimental results are reported
In-vehicle communication network statistical analysis using VHDL-AMS behavioral models
No full textIn-vehicle communication networks are a complex and safety-critical system, in which system reliability is essential. Network tests and verification by means of behavioral simulations have been widely adopted by the O&Ms. Among a series of advantages, behavioral simulations allow the statistical analysis performace evaluation, which is important to assess the system reliability. Our objective is to perform the in-vehicle verification, including Monte Carlo analysis, using the developed VHDL-AMS behavioral models. With this objective, we have developed the implementation of the Monte Carlo analysis through VHDL-AMS functions. The main advantage of this approach is the feature portability since it allows statistical simulation in any VHDL-AMS simulator (even if the simulator do not support statistical analysis). This paper presents the Monte Carlo implementation and reports results of the feature applied to a Flexray in-vehicle communication network. This work is part of a research activity in the field of mixed-mode behavioral models applied to the test and verification of in-vehicle communication networks
POSFET touch sensing transducers: Interface electronics design methodology based on the transconductance-to-drain-current efficiency gm/I D
No full textThis paper deals with tactile sensing systems based on a piezoelectric polymer poly(vinylidene fluoride-trifluoroethylene) film on the gate area of a MOS (Metal Oxide Semiconductor) transistor: Piezoelectric Oxide Semiconductor Field Effect Transistor, POSFET. More specifically, we present the design and analysis of the interface electronic circuit between the touch sensor transducer and the signal conditioning circuit stage. The circuit configuration is based on a NMOS transistor in common-drain and floating gate bias configuration. Such configuration enhances and complements the transducer's response. However, the circuit interface design suffers of the very difficult analytical tractability. For this reason, a graphical methodology, intended to give a criterion for achieving the selection of the most appropriate bias resistance value has been developed. The methodology utilizes the Advanced Compact MOSFET (ACM) model and the gm characteristic as function of the NMOS transistor drain current ID. A design space map shows confidence regions where the specifications such as touch sensing device gain, current consumption and source resistance value are met. The design methodology enables to push the performance of the POSFET by selecting the most appropriate bias resistance value and it reduces time-consuming iterations which are normally required. As a proof of concept of the proposed methodology, measurements as well as a design example are presented. © 2013 Elsevier B.V
A fully-automatic CAD toolbox for a MOS drain current model and its parameters extraction
No full textThis paper presents a CAD toolbox for a compact formulation of the MOS drain current. The formulation is based on the popular ACM model: the approximations introduced in the model preserve the drain-to-source device symmetry and the continuity between all regions of operation (i.e. weak, moderate and strong inversion). The major issue of the availability of the technological parameters is faced and a parameters extraction approach in a fully automated procedure were implemeted in the same toolbox. Finally, an example of application of the toolbox is presented. In the example a behavioral analysis of a sample-and-hold circuit is performed
High abstraction level CAD tool implementation of MOS drain current models
No full textThis paper presents a toolbox in which a compact high abstraction level formulation of the MOS drain current was implemented. The formulation is based on the popular ACM compact MOS model: the approximations introduced in the model preserve the drain-to-source device symmetry and the continuity between all regions of operation (i.e. weak, moderate and strong inversion). The technological parameters involved in the formulation are obtained by means of a fully automatic extraction procedure. Finally, a detailed case study, in which a behavioural analysis of sample-and-hold circuits using the proposed toolbox is performed, is presented. The ATMEL 0.24@mm CMOS process was used as reference for the case study. The MATLAB environment was used to implement the drain current model formulation, the technological parameters extraction and the case study as well
Analysis of charge injection in Sample and Hold MOS switches in terms of harmonic distortion
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