3 research outputs found
Porous silicon solar cells
No full textWe developed a new process for the fabrication of crystalline solar cell, based on an ultrathin silicon membrane, taking advantage of porous silicon technology. The suggested architecture allows the costs reduction of silicon based solar cell reusing the same wafer to produce a great number of membranes. The architectures combines the efficiency of crystalline silicon solar cell, with the great absorption of porous silicon, and with a more efficient way to use the material. The new process faces the main challenge to achieve an effective and not expensive passivation of the porous silicon surface, in order to achieve an efficient photovoltaic device. At the same time the process suggests a smart way to selective doping of the macroporous silicon layers despite the through-going pores. © 2015 IEEE.
SciVal Topic Prominence
Topic: Porous silicon | Silicon | macroporous silicon
Prominence percentile: 66.984
Author keywords
nanofabricationporous siliconsilicon nanoelectronicssolar cells
Indexed keywords
Engineering controlled terms:
Crystalline materialsNanoelectronicsNanostructured materialsNanotechnologyPorous siliconSiliconSilicon wafersSolar cells
Engineering uncontrolled terms
Crystalline silicon solar cellsCrystalline solar cellsMacro porous siliconPhotovoltaic devicesPorous silicon surfacesPorous silicon technologySilicon nanoelectronicsUltrathin silicon membrane
Engineering main heading:
Silicon solar cells
ISBN: 978-146738155-0
Source Type: Conference Proceeding
Original language: English
DOI: 10.1109/NANO.2015.7388710
Document Type: Conference Paper
Sponsors: Nanotechnology Council
Publisher: Institute of Electrical and Electronics Engineers Inc.
References (9)
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1
(2012) International Technology Roadmap for Photovoltaics Results 2012. Cited 24 times.
ITRPV, Third Edition, Berlin 2012
www.ITRPV.net
2
Lehmann, V., Honlein, W., Stengl, R., Willer, J., Wendt, H.
(1992) Verfahren Zur Herstellung Einer Solarzelle Aus Einer Substratscheibe. Cited 6 times.
German patent DE4204455C1; Filing date: 29. 01.
3
Brendel, R., Ernst, M.
Macroporous Si as an absorber for thin-film solar cells
(2010) Physica Status Solidi - Rapid Research Letters, 4 (1-2), pp. 40-42. Cited 22 times.
http://www3.interscience.wiley.com/cgi-bin/fulltext/123215552/PDFSTART
doi: 10.1002/pssr.200903372
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4
Ernst, M., Brendel, R., Ferré, R., Harder, N.-P.
Thin macroporous silicon heterojunction solar cells
(2012) Physica Status Solidi - Rapid Research Letters, 6 (5), pp. 187-189. Cited 16 times.
doi: 10.1002/pssr.201206113
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5
Ernst, M., Brendel, R.
Macroporous silicon solar cells with an epitaxial emitter
(2013) IEEE Journal of Photovoltaics, 3 (2), art. no. 6472253, pp. 723-729. Cited 7 times.
doi: 10.1109/JPHOTOV.2013.2247094
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6
Ernst, M., Schulte-Huxel, H., Niepelt, R., Kajari-Schröder, S., Brendel, R.
Thin crystalline macroporous silicon solar cells with ion implanted emitter (Open Access)
(2013) Energy Procedia, 38, pp. 910-918. Cited 2 times.
http://www.sciencedirect.com/science/journal/18766102
doi: 10.1016/j.egypro.2013.07.364
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7
Nenzi, P., Kholostov, K., Crescenzi, R., Bondarenka, H., Bondarenko, V., Balucani, M.
Electrochemically etched TSV for porous silicon interposer technologies
(2013) Proceedings - Electronic Components and Technology Conference, art. no. 6575887, pp. 2201-2207. Cited 2 times.
ISBN: 978-147990233-0
doi: 10.1109/ECTC.2013.6575887
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8
Perticaroli, S., Varlamava, V., Palma, F.
Microwave sensing of nanostructured semiconductor surfaces
(2014) Applied Physics Letters, 104 (1), art. no. 013110. Cited 3 times.
doi: 10.1063/1.4861424
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9
De Cesare, G., Caputo, D., Tucci, M.
Electrical properties of ITO/crystalline-silicon contact at different deposition temperatures
(2012) IEEE Electron Device Letters, 33 (3), art. no. 6142006, pp. 327-329. Cited 28 times.
doi: 10.1109/LED.2011.2180356
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RELX Group
We developed a new process for the fabrication of crystalline solar cell, based on an ultrathin silicon membrane, taking advantage of porous silicon technology. The suggested architecture allows the costs reduction of silicon based solar cell reusing the same wafer to produce a great number of membranes. The architectures combines the efficiency of crystalline silicon solar cell, with the great absorption of porous silicon, and with a more efficient way to use the material. The new process faces the main challenge to achieve an effective and not expensive passivation of the porous silicon surface, in order to achieve an efficient photovoltaic device. At the same time the process suggests a smart way to selective doping of the macroporous silicon layers despite the through-going pores
Developments of the pinned photodiode terahertz rectifier
No full textThis paper presents we presents a development of the structure of the pinned photodiode terahertz rectifier, in which the metal whisker of the antenna is separated from the semiconductor by a silane oxide layer, in order to reduce the surface defectiveness. The rectifies is the basic component of an image detection system based on the structure of actual CMOS image detectors. The structure combines a nano-antenna, fabricated on the top of a standard image sensor, the rectifier, and the readout electronics. The rectifier device proposed has vertical extension of some tenths of nanometers, can be created at the foot of the nano-whisker at the end of the terahertz antenna, above the storage well
Rf rectifier toward terahertz integrated image detector
No full textWe present a new CMOS compatible direct conversion terahertz detector operating at room temperature. The rectenna consists of an integrated antenna, realized on the surface of the integrated circuit and connected to a nanometric metallic whisker at one of its edges. The whisker reaches the semiconductor substrate that constitutes the antenna ground plane. The rectifying device can be obtained introducing some simple modifications of the charge storage well in conventional CMOS APS devices, making the proposed solution easy to integrate with existing imaging systems. No need of scaling toward very scaled and costly technological node is required, since the CMOS only provides the necessary integrated readout electronics. On-wafer measurements of RF characteristics of the designed rectifying junction are reported and discussed
