230 research outputs found

    Analysis of SET propagation in Flash-based FPGAs by means of electrical pulse injection

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    Advanced digital circuits are increasingly sensitive to single event transients (SETs) phenomena. Technology scaling has resulted in a greater sensitivity to single event effects (SEEs) and more in particular to SET propagation, since transients may be generated and propagated through the circuit logic, leading to behavioral errors of the affected circuit. When circuits are implemented on Flash-based FPGAs, SETs generated in the combinational logic resources are the main source of critical behavior. In this paper, we developed a technique based on electrical pulse injection for the analysis of SETs propagation within logic resources of Flash-based FPGAs. We outline logic schematic that allows the injection of different SET pulses. We performed several experimental analyses. We characterized the basic logic gates used by circuits implemented on Flash-based FPGAs evaluating the effect on logic-chains of real lengths. Additionally, we performed an effective analysis evaluating the SET propagation through microprocessor logic paths. Results demonstrated the possibility of mitigating SET-broadening effects by acting on physical place and route constraint

    Accurate Mitigation of Single Event Effects on Flash-based FPGAs: A new Design Flow

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    We propose a new design flow for implementing circuits hardened against SET effects af- fecting Flash-based FPGAs. Experimental results on RISC microprocessors show an in- crease of robustenss of more than 70% wrt traditional mitigation approache

    Single and Multiple Cell Upsets in 25-nm NAND Flash Memories

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    We analyzed floating-gate upsets in 25-nm multilevel cell NAND Flash memories irradiated with heavy ions, including alpha particles. Compared to multilevel cell memories of previous generations, these devices show no apparent error dependence on the program level, adherence to the cosine law, and a large number of multiple cell upsets (MCUs). Floating-gate errors were mapped to their physical location, and MCUs were studied as a function of their multiplicity, direction, particle linear energy transfer, irradiation angle, and program level

    Alpha-induced soft errors in Floating Gate flash memories

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    We study the sensitivity to alpha particles of state-of-the-art Multi-Level Cell (MLC) and Single-Level Cell (SLC) NAND Floating Gate (FG) flash memories with NAND architecture. We show that starting from a feature size of 50 nm, MLC flash memories are sensitive to alpha particles, whereas SLC devices do not show any sensitivity down to a feature size of 34 nm. We calculate the alpha-induced soft error rates on the field, discuss technology trends in comparison to heavy-ions

    Upsets in Phase Change Memories Due to High-LET Heavy Ions Impinging at an Angle

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    We present the first evidence of single event upsets in 45-nm phase change memories caused by high linear energy transfer (LET) heavy ions at tilted angles along the word line. Angular and LET dependences are presented, together with a discussion of the possible underlying mechanisms. The occurrence of a thermal spike, due to the ion passage, close to the heater/storage element interface is identified as the most plausible explanation. The upset cross section is compared with that of NOR Flash and finally the impact of scaling on the sensitivity of future memories is analyzed

    Single Event Effects in 3D NAND Flash Memory Cells with Replacement Gate Technology

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    We studied the heavy-ion single event effect response of 3D NAND Flash memory cells with charge-trap based replacement gate technology. Error cross sections, threshold voltage shifts, and underlying mechanisms are discussed. The behavior of replacement gate cells is compared with previous generations of Flash NAND memory cells with floating gate architecture, both planar and 3D. The cell array structure, the technology parameters, and the materials impacting on radiation susceptibility of the different types of cells are discussed

    Heavy-ion induced single event upsets in phase-change memories

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    We study the effects of exposure to accelerated neutron beams of Floating Gate (FG) Flash memories with NOR architecture. Error rates as well as threshold voltage shifts are examined and mechanisms are discussed. A comparison with NAND Flash memories, with both multi-level and single-level cell architecture, is performed. In addition to prompt effects, retention of irradiated cells is analyzed for several months after irradiation. Thanks to tail distributions, we can assess possible rare events

    Secondary Particles Generated by Protons in 3D NAND Flash Memories

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    We studied the secondary byproducts created by high-energy protons inside an SEU detector based on 3D NAND Flash memories, extending the previously developed methodology used for detecting heavy ions. The radiation response of the SEU monitor was discussed as a function of proton energy, analyzing parameters such as the number of clusters per particle, the cluster size, and the angle of the generated secondaries. The results provide interesting insight into the nuclear reactions occurring in state-of-the-art electronic chips, in addition to showing the usefulness of 3D NAND Flash memories for monitoring proton beams
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