10,116 research outputs found

    Full range voltage-controlled ring oscillator in 0.18 mu m CMOS for low-voltage operation

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    [[abstract]]A new differential delay cell with a complementary current control to increase the control voltage range as well as the operation frequency is proposed for low-voltage operation. The new differential delay cell is employed in a four-stage voltage-controlled ring oscillator (VCRO). The VCRO is implemented using 0.18 mu m 1P6M CMOS process and 1.8 V supply voltage. Measured results show that a wide operation frequency range from 5.36 to 3.03 GHz is achieved for the full range control voltage from 0 to 1.8 V. Measured phase noise is -107 dBc/Hz at 1 MHz offset from the 5.22 GHz centre frequency.[[note]]SC

    A novel nanofabrication technique for the array of nanogap electrodes

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    [[abstract]]We demonstrated a sidewall spacer nanofabrication technique for nanogap, electrodes fabrication. Nanogap between gold and polycrystalline silicon (ploy-Si) electrodes is defined without using any advanced lithographic techniques. The feature size of nanogap electrodes fabricated using this technique is mainly determined by the thickness of sidewall spacer. The proposed technique showed that reproducible nanogap distances from 10 to 100 nm on the 6 in. wafer were easily obtained. Binding of 15 nm gold nanoparticles across the 10 nm electrodes leading to a drastic change of the electrical conductance has also been demonstrated. Under a bias of 3 V, the conductive current increases from 2 pA to 300 nA after binding of 15 nm gold nanoparticles across the 10-nm electrodes. We believed that this technique can be contributed to the development of high-density nanogap electrodes for applications in biomolecules or nanoparticles detection.[[note]]SC

    Untitled "Guest Editorial" 

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    [[abstract]]None[[note]]SC

    Low-Voltage and High-Speed Voltage-Controlled Ring Oscillator with Wide Tuning Range in 0.18 mu m Complementary Metal Oxide Semiconductor

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    [[abstract]]A new complementary metal oxide semiconductor (CMOS) differential delay cell for a voltage-controlled ring oscillator with a wide tuning range and high speed is proposed in this paper. The new differential delay cell employing a complementary current control scheme can increase not only the control voltage range but also the operation frequency in low-voltage operation. Using the new delay cells, a ring voltage-controlled oscillator employing a three-stage structure and multiple-pass loop techniques is implemented in the 0.18 mu m single-poly-six-metal (1P6M) CMOS process at a 1.8V supply voltage to achieve a wide tuning range and high speed. Measured results show that a wide operation frequency range from 8.36 to 1.29 GHz is accomplished for the full-range control voltages from 0 to 1.8 V. When the supply voltage is 1 V, the operation frequencies are from 4.09 to 0.479 GHz for the full-range control voltages from 0 to 1 V. The measured phase noise is -100.22 dBc/Hz at 1MHz offset from the 8.35 GHz center frequency and the figure of merit (FOM) is -159.95 dBc/Hz. The chip core area without PAD is 106 x 76: 2 mu m(2). (C) 2011 The Japan Society of Applied Physics[[note]]SC

    Low Parasitic Capacitance and Low-Power CMOS Capacitive Fingerprint Sensor

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    [[abstract]]In this paper, a low parasitic capacitance and low-power CMOS capacitive fingerprint sensor readout circuit is presented. The side effect of parasitic capacitance has been under control with novel layout structure in sensor cell, and minimal size switch is used to reduce non-ideal effects of MOS switch and achieve good linearity. Power dissipation is also reduced with quiescent current control in buffer amplifier of sensor cell. A prototype chip with 32 x 32 array size has been fabricated using TSMC 0.35 mu m CMOS process. The chip works at 3.3V power supply and operates at 4MHz clock rate. Capacitance value from 0ff to 60fF can be sensed, corresponding analog output voltage is from 3.02V to 1.57V and the digital output is 6 bits. The overall power consumption is less than 5.5mW.[[note]]SC

    A Capacitance-Ratio-Modulated Current Front-End Circuit With Pulsewidth Modulation Output for a Capacitive Sensor Interface

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    [[abstract]]This paper presents a front-end circuit with pulsewidth modulation (PWM) output for a capacitive sensor interface. A single-MOSFET-based capacitance-ratio-modulated current (CRMC) circuit is proposed to transform the sensed capacitance into a current proportional to a capacitance ratio. The proposed single-MOSFET-based CRMC circuit not only saves a lot of chip area but also lowers power consumption. Then, a dual-slope integration circuit transforms further the modulated current into PWM output. A prototype chip is designed and fabricated with a 0.35-mu m complementary metal-oxide-semiconductor process and has a core area of 0.09 mm(2). The measurement results of the prototype chip demonstrate an accuracy value of up to 9.3 bit with 54-mu W power consumption. The microwatt power consumption and the small chip area of the proposed front-end circuit make it very suitable for a capacitive sensor interface in smart sensor chips.[[note]]SC

    A 1-V 4-GHz wide tuning range voltage-controlled ring oscillator in 0.18 mu m CMOS

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    [[abstract]]A new differential delay cell with complementary current control to extend the control voltage range as well as the operation frequency is proposed for low voltage and wide tuning range voltage-controlled ring oscillator (VCRO). The complementary current control can get rid of the restriction that control voltage is unable to cover the full range of power supply voltage in a conventional VCRO. A three-stage VCRO chip working with 1 V power supply voltage is constructed using 0.18 mu m 1P6M CMOS process for verifying the efficacy of the proposed differential delay cell. Measured results of the VCRO chip show that a wide range of operation frequency from 4.09 GHz to 479 MHz, a tuning range of 88%, is achieved for the full range of control voltage from 0 to 1 V. The power consumptions of the chip are 13 and 4 mW for oscillation outputs of 4.09 GHz and 479 MHz, respectively. The measured phase noise is -93.3 dBc/Hz at 1 MHz offset from 4.09 GHz center frequency. The core area of the chip is 106 mu m x 76.2 mu m. Crown Copyright (C) 2011 Published by Elsevier Ltd. All rights reserved.[[note]]SC

    Implementation of a 2.45GHz Passive RFID Transponder Chip in 0.18 mu m CMOS

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    [[abstract]]In this paper, a passive 2.45GHz band RFID transponder chip for high data rate communication and with low power consumption has been presented. The passive transponder chip contains five parts: a voltage multiplier converts received RE signal to the DC power supply, a mode selector decides the operating status, a low power dissipation LC-tank voltage control oscillator, a 32-bit read only memory, and a modulator. The RF-to-DC circuit can generate the required power supply and bias voltages from received 2.45GHz RF signal with 250mV amplitude. The data stored in 32-bit ROM can modulate the 2.45GHZ carrier generated by VCO at up to 153Mbps for backscattering the data. The chip was designed and implemented by using TSMC 0.18 mu m 1P6M CMOS process. The chip area is 905 mu m x 652 mu n with simulated power consumption less than 4mW. The measurement and simulation results are well matched.[[note]]SC
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