78 research outputs found
MODEL-BASED HARDWARE DESIGN FOR IMAGE PROCESSING SYSTEMS
No full textModel-based design has been touted as the most viable design methodology of the future for the design of embedded hardware/software systems. Due to the large complex-ity of modern embedded systems, it is more and more error-prone to design systems with-out having a formal model to support and verify the application at design time. Also, formal models generally capture broad classes of applications, and thus any innovation on a modeling technique has the potential to enhance every individual application in the asso-ciated class. Often, a formal model captures the high-level abstraction of an application, which is lost in the final implementation, and thus modeling gives an effective platform to perform high-level design optimizations. Dataflow graphs have been widely used as for-mal models in the signal processing domain for a long time, and various commercial tools have adopted dataflow semantics for model-based design methodology. In this thesis, we develop a new dataflow meta-modeling technique, called homoge-neous parameterized dataflow (HPDF). HPDF is a meta-modeling technique in that it can be applied to a variety of underlying dataflow models of computation to enhance their expressive power, while maintaining much of the useful structure of the underlying mod
Research Article Dataflow-Based Mapping of Computer Vision Algorithms onto FPGAs
No full textWe develop a design methodology for mapping computer vision algorithms onto an FPGA through the use of coarse-grain reconfigurable dataflow graphs as a representation to guide the designer. We first describe a new dataflow modeling technique called homogeneous parameterized dataflow (HPDF), which effectively captures the structure of an important class of computer vision applications. This form of dynamic dataflow takes advantage of the property that in a large number of image processing applications, data production and consumption rates can vary, but are equal across dataflow graph edges for any particular application iteration. After motivating and defining the HPDF model of computation, we develop an HPDF-based design methodology that offers useful properties in terms of verifying correctness and exposing performance-enhancing transformations; we discuss and address various challenges in efficiently mapping an HPDF-based application representation into target-specific HDL code; and we present experimental results pertaining to the mapping of a gesture recognition application onto the Xilinx Virtex II FPGA. Copyright © 2007 Mainak Sen et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. 1
On probing turbulence in core-collapse supernovae in upcoming neutrino detectors
No full textNeutrino propagation through a turbulent medium can be highly non-adiabatic
leading to distinct signatures in the survival probabilities. A core-collapse
supernova can be host to a number of hydrodynamic instabilities which occur
behind the shockfront. Such instabilities between the forward shock and a
possible reverse shock can lead to cascades introducing turbulence in the
associated matter profile, which can imprint itself in the neutrino signal. In
this work, we consider realistic matter profiles and seed in the turbulence
using a randomization scheme to study its effects on neutrino propagation in an
effective two-flavor framework. In particular, we find that the double-dip
feature, originally predicted in the neutrino spectra associated with forward
and reverse shocks, can be completely washed away in the presence of
turbulence, leading to total flavor depolarization. We also study the
sensitivity of upcoming neutrino detectors - DUNE and Hyper-Kamiokande- to the
power spectrum of turbulence to check for deviations from the usual Kolmogorov
() inverse power law. We find that while these experiments can effectively
constrain the parameter space for the amplitude of the turbulence power
spectra, they will only be mildly sensitive to the spectral index.Comment: 18 pages, 8 figure
Dimension Reduction in Big Data Environment-A Survey
No full textRelational database management system is able to tackle data set which is structured in some way and by means of querying to the system user gets certain answer. But if the data set itself does not lie under any sort of structure, it is generally very tedious job for user to get answer to certain query. This is the new challenge coming out for the last decade to the scientists, researchers, industrialists and this new form of data is termed as big data. Parallel computation not only from the concept of hardware, but different application dependent software is now being developed to tackle this new data set for solving the challenges generally attached with large data set such as data curation, search, querying, storage etc. Information sensing devices, RFID readers, cloud storage now days are making data set to grow in an increasing manner. The goal of big data analytics is to help industry and organizations to take intelligent decisions by analyzing huge number of transactions that remain untouched till today by conventional business intelligent systems. As the size of dataset grows large also with redundancy, software and people need to analyze only useful information for particular application and this newly reduced dataset are useful compare to noisy and large data
Systematic exploitation of data parallelism in hardware synthesis of DSP applications
No full textIn this paper, we describe an approach that we explored for low-power synthesis and optimization of digital signal, image, and video processing (DSP) applications. In particular, we consider the systematic exploitation of data parallelism across the operations of an application dataflow graph when synthesizing a dedicated hardware implementation. Data parallelism occurs commonly in DSP applications, and provides flexible opportunities to increase throughput or lower power consumption. Exploiting this parallelism in dedicated hardware implementation comes at the expense of increased resource requirements, which must be balanced carefully when applying the technique in a design tool. We propose a high level synthesis algorithm to determine the data parallelism factor for each computation, and based on the area and performance trade-off curve, design an efficient hardware representation of the dataflow graph. For performance estimation, our approach uses a cyclostatic dataflow intermediate representation of the hardware structure under synthesis. We then apply an automatic hardware generation framework to build the actual circuit. 1
Author Correction to: Extreme Learning Machine Framework for Risk Stratification of Fatty Liver Disease Using Ultrasound Tissue Characterization
No full textThe original version of this article unfortunately contained a mistake. The family name of Rui Tato Marinho was incorrectly spelled as Marinhoe
Sensor localization using received signal strength measurements for obstructed wireless sensor networks with noisy channels
No full textThis paper proposes a new approach to cope with the challenges in sensor localization in an obstructed environment even in the presence of channel noise. In particular, a progressive localization scheme is proposed that does not necessitate the need for any cluster as most existing schemes do. Initialization is done by generating a quadrilateral of sensor nodes where the connectivity weight between them is computed based on the estimated distance from a reference point, which may be any vertex of the quadrilateral. Distances between sensor nodes are mapped from a path-loss model that is governed by the NLOS and Rayleigh fading models, considering noisy communication channel. With the initial quadrilateral characterized, the other sensor nodes are localized in a progressive manner based on the same mapping model. Errors due to presence of obstacles and noisy channel are reduced by studying the estimated distances contributed from the neighboring sensor nodes. Efficiency of our proposed scheme is measured in terms of total power dissipation for localization and the total degree of neighboring nodes required for error reduction. Apart from simulation experiments, we verify our proposed scheme using real hardware deployment in both indoor and outdoor environments. Results reveal that the proposed scheme improves localization precision substantially
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