1,721,312 research outputs found
Digitally programmable transconductance amplifier for CNN applications
No full textA major problem in the VLSI implementation of cellular neural networks (CNNs) is that of achieving ease of programmability of the templates. The authors present a very efficient VLSI implementation of a digitally programmable transconductance amplifier for cellular neural network applications with discrete templates
A 3x3 digitally programmable CNN chip
No full textIn this paper a VLSI implementation of a 3 x 3 cell digitally programmable cellular neural networks (CNN) with discrete templates is presented. This chip is the first successfully tested, multichip-oriented CNN chip. In fact, this chip has been designed to be easily interconnected to others to carry out very large CNN arrays. This feature has been verified in a two-chip prototype board. The fully programmable capability covers most of the available one-neighbourhood fixed templates
Programmable CNN analogue chip for RD-PDE multi-method simulations
No full textCellular Non Linear Networks can be useful applied for the solution of several types of Partial Differential Equations (PDEs). This paper will describe an analogue circuit implementation for the simulation of one-dimensional Reaction-Diffusion PDE with the possibility to set different boundary conditions as well as to select different discretization methodologies
CNN cell for computing disparity map
No full textThe real-time estimation of the distance of objects from an observer is a critical issue in several application fields. A new cellular neural network circuit that uses a stereo vision algorithm to compute the disparity map is presented
A Fully digitally programmable CNN chip
No full textThe successful development of cellular neural networks is dependent on hardware implementation. This letter presents a VLSI implementation of a multichip-oriented, fully programmable, 3×3 digitally programmable cellular neural network (DPCNN). This chip covers most of the available one-neighborhood templates for image processing applications. Moreover, it can be easily interconnected to others to carry out very large CNN arrays
High performance digitally programmable CNN chip with discrete templates
No full textIn this paper a high performance VLSI implementation of a 3×3 Digitally Programmable Cellular Neural Networks with discrete templates is presented. This chip, manufactured and successfully tested, gives an efficient solution to the hardware implementation of the Cellular Neural Networks. Moreover this chip can be connected to others to carry out very large CNN arrays. This implementation covers the 66% of the available one-neighborhood fixed templates for image processing applications
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