160,542 research outputs found
Fully digital hysteresis modulation with switching-time prediction
No full textThis paper proposes a digital hysteresis-modulation technique based on switching-time prediction. Sampling controlled variables several times within a switching period, it ensures a dynamic performance comparable to that obtainable with analog hysteresis modulation. Compared to conventional digital hysteresis modulation, it avoids frequency jitter since it predicts switching transitions. Compared to hysteresis modulation based on the detection of the zero crossing of current errors, it avoids external analog circuits. Compared to pulsewidth-modulation (PWM) techniques, it ensures faster dynamic response. These advantages are obtained at the expense of increased signal-processing requirements and of control complexity. Switching-frequency stabilization and synchronization with an external clock can be obtained extending the techniques proposed for analog hysteresis modulations. The proposed predictive algorithm does not require knowledge of load parameters and only a rough estimation of the inductor value, which can be easily self-adjusted. The proposed solution is suited for high-performance current (or sliding-mode) control where the digital hardware has enough computational power to allow multiple samples within a switching period. The proposed modulation technique has been applied to a sliding-mode control of a single-phase uninterruptible power supply (UPS). Experimental results confirm the effectiveness of the proposed approach
Analysis of multi-sampled current control for active filters
No full textThis paper investigates the multi-sampling
techniques applied to the current control in active power filter
applications. In active power filter applications with digital
control, the main bandwidth limitation derives from A/D
conversion time, calculation delays and the sample-and-hold
effect for the Digital-Pulse-Width Modulation (DPWM). Using
Field Programmable Gate Arrays (FPGAs) and fast A/D
converters for the control implementation, it is possible to
make the former two negligible with respect to the switching
period. Thus, the overall phase lag is dominated by the
DPWM, which can be strongly reduced by multiple sampling
approach, thus breaking bandwidth limitation of singlesampled
solutions. Moreover, as the multi-sampling approach
triggers nonlinear behaviors that can negatively impact the
filter compensating capabilities, a solution is proposed, based
on a simple digital filter, that linearizes the system behavior
and does not waste the multi-sampling phase boost property.
Simulation and experimental results on a 10 kVA prototype
confirm the theoretical expectations
Communication on Power Lines Using Frequency and Duty-Cycle Modulation in digitally Controlled dc-dc Converters
No full textThis paper investigates power line communication in digitally-controlled dc-dc converters in distributed architectures that share the same bus voltage. Communication between different dc-dc converters is obtained by means of switching frequency and duty-cycle modulation detecting the switching signal on the common supply bus voltage. The proposed solution is simple and it takes the full advantages of integrated digital control, enabling intelligent power management and communication. Even if aimed to an integrated digital controller, experimental investigation has been performed using discrete components, implementing the communication architecture in FPGAs. Simulation and experimental results in a dc-dc buck converter confirm the proposed analysis and the performance achievable by the proposed power line communication techniques
Efficiency estimation in digitally-controlled dc-dc buck converters based on single current sensing
No full textThis paper proposes an efficiency estimator for dc-dc buck converters suitable for on-chip integration in the digital IC controller. The proposed solution is tailored for distributed power architectures, where the on-line efficiency measurement or estimation of each dc-dc converter is useful in order to perform a system power management and to monitor the status of each point of load (POL) converter. Existing solutions relay on the measurement of the input voltage and current, output voltage and current, the latter usually based on the output inductor current sensing (at least for buck-type converters). The current sensing is the main drawback since it requires two current sensors and, more importantly, a precise matching, tuning and temperature compensation in the two current sensors. This paper proposes an indirect estimation of the ratio between the output and input current based on a single current sensing, thus avoiding precise gain tuning. The current sensing is based on the input bus voltage and a filter matched with the impedance seen by the dc-dc converter. Experimental results on a synchronous buck converter with the efficiency estimator implemented in a field programmable gate array (FPGA) show the properties as well as the limitations of the proposed method
Simplified Model Reference-Based Autotuning for Digitally Controlled SMPS
No full textThis paper presents a closed-loop self-tuning technique
for digitally controlled dc–dc switched-mode power supplies
(SMPS) based on proportional-integral-derivative (PID) regulators,
which derives from the more general model reference
autotuning techniques. After briefly discussing an open loop,
model-reference based tuning technique, a closed-loop solution is
presented in which a perturbation frequency generated digitally is
injected into the control loop and superimposed to the duty cycle
command. The tuning is performed elaborating the signals right
before and right after the injection point, and adjusting the PID parameters
until predefined bandwidth and phase margin targets are
obtained.Theproposed approach allowsfor a robustandrepeatable
tuning, mainly because of the high resolution and dynamics available
at the signal injection point. Moreover, the tuning is performed
maintaining the closed-loop configuration, thus ensuring voltage
regulation even during the PID adjustment, this being a fundamental
constraint for most electronic equipments. The proposed
technique is simple from the signal processing point of view, since it
requires a few integrations, multiplications and phase-shift; further
simplified implementations by employing nonsinusoidal perturbation
waveforms like square-wave or triangular signals are also
proposed. The approach is first discussed for two-parameters PI
and PD regulators, and successively extended to PID structures, for
whichtwopossible implementations areproposed.Theeffectiveness
of the tuning approach is verified by means of computer simulations
and experimental tests carried out on a digital signal processor
platform interfaced with a prototype point-of-load converter. The
complexity of an HDL-implementation of the tuning hardware for
field programmable gate array platforms is also discussed
Monte Carlo Simulation of Substrate Enhanced Electron Injection in Split-gate Memory Cells
No full textIn this paper, we use fullband Monte Carlo simulations and gate current measurements to investigate charge injection in split-gate memory cells under negative substrate bias. It is shown that, in the source-side-injection (SSI) regime, the enhancement of the programming efficiency due to the substrate bias is low, unless very low drain and floating-gate biases are considered. In particular, the enhancement of the efficiency is largely reduced if the drain current is kept constant when comparing different substrate biases. Furthermore, it is observed that the carrier injection profile under negative substrate bias is broader than in the SSI regime, and a substantial amount of charge is injected in the spacer region
Digital Control of single-phase Power Factor Preregulator suitable for Smart-Power Integration
No full textThis paper proposes a fully digital control of boost power factor preregulators (PFPs) with input voltage estimation that is suitable for smart-power integration. The proposed solution features a minimum pin count by avoiding direct sensing of the input voltage for the construction of the internal current reference signal and by sensing the output voltage through a direct sampling of the voltage across the power switch during its off interval at the line voltage peak. The control algorithm requires the estimation of the rectified input voltage, that is simply done by exploiting the integral part of the current loop PI regulator, and a PLL (phase-looked-loop) synchronization with the estimated line frequency for sampling the output voltage and rejecting the low-frequency output voltage ripple. The provisions needed to ensure correct output voltage sensing, even during transient and light-load conditions, are also discussed. Experimental results on a single-phase boost PFP show the properties of the proposed approach
Digital Control of single-phase Power Factor Preregulator based on current and voltage sensing at switch terminals
No full textThis paper proposes a fully digital control of boost power factor preregulators (PFPs) with input voltage estimation that is suitable for smart-power integration. The proposed solution features a minimum pin count by avoiding input voltage sensing for the generation of the internal current reference and by sensing the output voltage through the direct sampling of the voltage across the power switch during its off interval at the line voltage peak. The control algorithm requires the estimation of the rectified input voltage, that is simply done by exploiting the integral part of the current loop proportional–integral regulator, and a phase-looked-loop (PLL) synchronization with the estimated line frequency for sampling the output voltage and rejecting the
low-frequency output voltage ripple. The provisions needed to
ensure correct output voltage sensing, even during transient and
light-load conditions, are also discussed. Experimental results on
a single-phase boost PFP show the properties of the proposed
approach
“Transmitting apparatus of digital signals on a supply line of electronic devices and corresponding method ”
No full textA power converter having a noise component and a modulator configured to vary a frequency of the noise component of the power converter on the basis of a digital signal to be transmitted
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