1,720,968 research outputs found
A collision-free time-to-first spike camera architecture based on a winner-take-all network
No full textA 100uW 128x64 pixels contrast-based asynchronous binary vision sensor for sensor networks application
No full textAn ultra-low power 128 times 64 pixels vision sensor is here presented, featuring pixel-level spatial contrast extraction and binarization. The asynchronous readout only dispatches the addresses of the asserted pixels in bursts of 80 MB/s, significantly reducing the amount of data at the output. The pixel-embedded binary frame buffer allows the sensor to directly process visual information, such as motion and background subtraction, which are the most useful filters in machine vision applications. The presented sensor consumes less than 100 muW at 50 fps with 25% of pixel activity. Power consumption can be further reduced down to about 30 muW by operating the sensor in Idle-Mode, thus minimizing the sensor activity at the output
A self-adapting high dynamic-range visual representation algorithm for AER imagers
No full textA novel algorithm for high intra-scene dynamic-range images representation is here proposed, which is based on Address Event Representation (AER) visual data. The values of the spiking pixels coming from the sensor are dynamically mapped into an 8-bit output, providing a real-time equalization of the scene. The algorithm has been tested using an AER emulator, based on a time-to-first spike imager. The simple implementation of the proposed technique makes it particularly suitable for AER sensors, turning into a real time processing and large programmability on the output tone mapping
A low-power interface for the readout and motion-control of a MEMS capacitive sensor
No full textA low-power interface for readout and motion-control of a MEMS capacitive sensor is presented. The interface consists of a hybrid third-order sigma-delta modulator. The interface enhances the linearity and stability of the sensor by applying force feedback through bias voltage modulation. The modulator employs a hybrid, continuous + discrete-time topology, to reduce power consumption by avoiding a separate pre-amplifier for the sensor. Power consumption in the modulator is further reduced by an op-amp sharing scheme. The interface is designed in 0.35 um CMOS technology and is simulated in Cadence-Spectre. Simulation results are shown for a MEMS capacitive microphone
A MEMS microphone interface with force-balancing and charge-control
No full textThis paper presents a low-power CMOS interface for a MEMS capacitive sensor. The interface has embedded force-balancing capability which improves the linearity of the readout for higher sound pressures. The interface also features a bias-charge control functionality to enhance the sensitivity of the microphone. The interface employs boot-strapped preamplifier for active parasitic capacitance compensation, followed by a 3rd-order sigma-delta modulator. The interface is designed in 0.35um CMOS technology and its brief simulation results in Cadence-Spectre are presented
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