196,033 research outputs found
Coccus rusci Linnaeus, 1758, spec. nov.
No full textCoccus rusci [spec. nov.] C. Rusci, testa octo clypeolis cincta. Column. purp. 16. 4: 17. Lepas nova s. myrti morbus. Klein. ostr. 116. Lepas tessellata. Habitat in Apulia. M. Kaehler. Testa truncata, octagona, perforata, cincta octo clypeolis instar testudinis: horum omnes in medio granulo notati, exceptis duobus lateralibus oppositis.Published as part of Linnaeus, Carolus, 1758, Systema Naturae per regna tria naturae: secundum classes, ordines, genera, species, cum characteribus, differentiis, synonymis, locis, Stockholm :Laurentius Salvius on page 456, DOI: 10.5962/bhl.title.542, http://zenodo.org/record/392220
CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices
No full textLow-precision integer arithmetic is a necessary ingredient for enabling Deep Learning inference on tiny and resource-constrained IoT edge devices. This brief presents CMix-NN, a flexible open-sourceCMix-NN is available at https://github.com/EEESlab/CMix-NN. mixed low-precision (independent tensors quantization of weight and activations at 8, 4, 2 bits) inference library for low bitwidth Quantized Networks. CMix-NN efficiently supports both Per-Layer and Per-Channel quantization strategies of weights and activations. Thanks to CMix-NN, we deploy on an STM32H7 microcontroller a set of Mobilenet family networks with the largest input resolutions ( 224 imes 224 ) and higher accuracies (up to 68% Top1) when compressed with a mixed low precision technique, achieving up to +8% accuracy improvement concerning any other published solution for MCU devices
Reduced precision floating-point optimization for Deep Neural Network On-Device Learning on microcontrollers
No full textEnabling On-Device Learning (ODL) for Ultra-Low-Power Micro-Controller Units (MCUs) is a key step for post-deployment adaptation and fine-tuning of Deep Neural Network (DNN) models in future TinyML applications. This paper tackles this challenge by introducing a novel reduced precision optimization technique for ODL primitives on MCU-class devices, leveraging the State-of-Art advancements in RISC-V RV32 architectures with support for vectorized 16-bit floating-point (FP16) Single-Instruction Multiple-Data (SIMD) operations. Our approach for the Forward and Backward steps of the Back Propagation training algorithm is composed of specialized shape transform operators and Matrix Multiplication (MM) kernels, accelerated with parallelization and loop unrolling. When evaluated on a single training step of a 2D Convolution layer, the SIMD-optimized FP16 primitives result up to 1.72x faster than the FP32 baseline on a RISC-V-based 8+1-core MCU. An average computing efficiency of 3.11 Multiply and Accumulate operations per clock cycle (MAC/clk) and 0.81 MAC/clk is measured for the end-to-end training tasks of a ResNet8 and a DS-CNN for Image Classification and Keyword Spotting, respectively - requiring 17.1 ms and 6.4 ms on the target platform to compute a training step on a single sample. Overall, our approach results more than two orders of magnitude faster than existing ODL software frameworks for single-core MCUs and outperforms by 1.6x previous FP32 parallel implementations on a Continual Learning setup.& COPY; 2023 Elsevier B.V. All rights reserved
Leveraging Automated Mixed-Low-Precision Quantization for Tiny Edge Microcontrollers
No full textThe severe on-chip memory limitations are currently preventing the deployment of the most accurate Deep Neural Network (DNN) models on tiny MicroController Units (MCUs), even if leveraging an effective 8-bit quantization scheme. To tackle this issue, in this paper we present an automated mixed-precision quantization flow based on the HAQ framework but tailored for the memory and computational characteristics of MCU devices. Specifically, a Reinforcement Learning agent searches for the best uniform quantization levels, among 2, 4, 8 bits, of individual weight and activation tensors, under the tight constraints on RAM and FLASH embedded memory sizes. We conduct an experimental analysis on MobileNetV1, MobileNetV2 and MNasNet models for Imagenet classification. Concerning the quantization policy search, the RL agent selects quantization policies that maximize the memory utilization. Given an MCU-class memory bound of 2 MB for weight-only quantization, the compressed models produced by the mixed-precision engine result as accurate as the state-of-the-art solutions quantized with a non-uniform function, which is not tailored for CPUs featuring integer-only arithmetic. This denotes the viability of uniform quantization, required for MCU deployments, for deep weights compression. When also limiting the activation memory budget to 512 kB, the best MobileNetV1 model scores up to 68.4% on Imagenet thanks to the found quantization policy, resulting to be 4% more accurate than the other 8-bit networks fitting the same memory constraints
Work-in-Progress: Quantized NNs as the Definitive solution for inference on low-power ARM MCUs?
No full textHigh energy efficiency and low memory footprint are the key requirements for the deployment of deep learning based analytics on low-power microcontrollers. Here we present work-in-progress results with Q-bit Quantized Neural Networks (QNNs) deployed on a commercial Cortex-M7 class microcontroller by means of an extension to the ARM CMSIS-NN library. We show that i) for Q=4 and Q=2 low memory footprint QNNs can be deployed with an energy overhead of 30% and 36% respectively against the 8-bit CMSIS-NN due to the lack of quantization support in the ISA; ii) for Q=1 native instructions can be used, yielding an energy and latency reduction of ∼3.8× with respect to CMSIS-NN. Our initial results suggest that a small set of QNN-related specialized instructions could improve performance by as much as 7.5× for Q=4, 13.6× for Q=2 and 6.5× for binary NNs
Multi-resolution Rescored ByteTrack for Video Object Detection on Ultra-low-power Embedded Systems
No full textThis paper introduces Multi-Resolution Rescored ByteTrack (MR2-ByteTrack), a novel video object detection framework for ultra-low-power embedded processors. This method reduces the average compute load of an off-the-shelf Deep Neural Network (DNN) based object detector by up to 2.25× by alternating the processing of high-resolution images (320 × 320 pixels) with multiple down-sized frames (192×192 pixels). To tackle the accuracy degradation due to the reduced image input size, MR2-ByteTrack correlates the output detections over time using the ByteTrack tracker and corrects potential misclassification using a novel probabilistic Rescore algorithm. By interleaving two down-sized images for every high-resolution one as the input of different state-of-the-art DNN object detectors with our MR2-ByteTrack, we demonstrate an average accuracy increase of 2.16% and a latency reduction of 43% on the GAP9 microcontroller compared to a baseline frame-by-frame inference scheme using exclusively full-resolution images. Code available at: https://github.com/Bomps4/Multi-Resolution-Rescored-ByteTrac
Spirostanol saponins and esculin from Rusci rhizoma reduce the thrombin-induced hyperpermeability of endothelial cells
No full textRusci rhizoma extracts are traditionally used against chronic venous disorders (CVD). To determine the effect of its secondary plant metabolites on the endothelium, phenolic compounds and saponins from Butcher's broom were isolated from a methanolic extract, and their activity on the thrombin-induced hyperpermeability of human microvascular endothelial cells (HMEC-1) was investigated in vitro. In addition to the six known spirostanol saponins deglucoruscin (5), 22-O-methyl-deglucoruscoside (6), deglucoruscoside (7), ruscin (8), ruscogenin-1-O-(alpha-L-rhamnopyranosyl-(1 -> 2)-beta-D-galactopyranoside (9) and 1-O-sulpho-ruscogenin (10), three new spirostanol derivatives were isolated and identified: 3'-O-acetyl-4'-O-sulphodeglucoruscin (1), 4'-O-(2-hydroxy-3-methylpentanoyl)-deglucoruscin (2) and 4'-O-acetyl-deglucoruscin (3). Furthermore, the coumarin esculin (4), which is also prominently present in other medicinal plants used in the treatment of CVD, was isolated for the first time from Rusci rhizoma. Five of the isolated steroid derivatives (2, 5, 8, 9 and 10) and esculin (4) were tested for their ability to reduce the thrombin-induced hyperpermeability of endothelial cells in vitro, and the results were compared to those of the aglycone neoruscogenin (11). The latter compound showed a slight but concentration-dependent reduction in hyperpermeability to 71.8% at 100 mu M. The highest activities were observed for the spirostanol saponins 5 and 8 and for esculin (4) at 10 mu M, and these compounds resulted in a reduction of the thrombin-induced hyperpermeability to 41.9%, 42.6% and 533%, respectively. For 2, 5 and 8, the highest concentration tested (100 mu M) resulted in a drastic increase of the thrombin effect. The effect of esculin observed at a concentration of 10 mu M was diminished at 100 mu M. These in vitro data provide insight into the pharmacological mechanism by which the genuine spirostanol saponins and esculin can contribute to the efficacy of Butcher's broom against chronic venous disorders. (C) 2013 Elsevier Ltd. All rights reserved
PULP-NN: A computing library for quantized neural network inference at the edge on RISC-V based parallel ultra low power clusters
No full textWe present PULP-NN, a multicore computing library for a parallel ultra-low-power cluster of RISC-V based processors. The library consists of a set of kernels for Quantized Neural Network (QNN) inference on edge devices, targeting byte and sub-byte data types, down to INT-1. Our software solution exploits the digital signal processing (DSP) extensions available in the PULP RISC-V processors and the cluster's parallelism, improving performance by up to 63× with respect to a baseline implementation on a single RISC-V core implementing the RV32IMC ISA. Using the PULP-NN routines, the inference of a CIFAR-10 QNN model runs in 30× and 19.6× less clock cycles than the current state-of-the-art ARM CMSIS-NN library, running on an STM32L4 and an STM32H7 MCUs, respectively. By running the library kernels on the GAP-8 processor at the maximum efficiency operating point, the energy efficiency on GAP-8 is 14.1× higher than STM32L4 and 39.5× than STM32H7
An Energy Optimized JPEG Encoder for Parallel Ultra-Low-Power Processing-Platforms
No full textThe energy autonomy and the lifetime of battery-operated sensors are primary concerns in industrial, healthcare and IoT applications, in particular when a high amount of data needs to be sent wirelessly such as in Wireless Camera Sensors (WCS). Onboard real-time image compression is the appropriate solution to decrease the system’s energy. This paper proposes an optimized algorithm implementation tailored for PULP (Parallel Ultra Low Power) processors, that permits to shrink the image size and the data to transmit. Our optimized JPEG encoder based on a Fast-Discrete Cosine Transform (DCT) function is designed to achieve the best trade-off between energy consumption and image distortion. The parallel software implementation requires only 0.495 mJ per frame and can support up to 80 fps satisfying the most stringent requirements in WCSs applications without requiring a dedicated hardware accelerator
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