86,556 research outputs found
A CMOS Sub-Harmonic Architecture for Signal Down-Converion at Ka-Band
No full textQuadrature Sub-Harmonic mixing to DC or low-IF can be attractive for signal processing at Ka-band. Frequency translation is performed without the need for a local oscillator at the received signal frequency. A lower frequency reference takes advantage of the higher quality of tuning elements and avoids high frequency, powerhungry dividers in the synthesizer. Moreover DC offsetand second-order inter-modulation distortion, due to poor LO-RF isolation, are mitigated by the LO running at lower frequency. This paper presents the receiver IC architecture and experiments from a quadrature demodulator realized in 65nm CMOS
A Lumped Element Phisical Model for Symetrical Spiral Inductors and their Cross-Talk in silicon RFICs
No full textModern RFICs have achieved an impressively high integration level, making cross-coupling effects among different sections of the circuit a potential limit to their functionality. Integrated spiral inductors occupy a significant chip area and are a potential source of EM interference. This paper investigates the coupling effects between two planar spiral inductors. A physical model for the single inductor is introduced, valid for any kind of excitation (single-ended, differential and also common-mode). The model is then extended to correctly reproduce the coupling behavior under any kind of excitation
A simple and complete circuit model for the coupling between symmetrical spiral inductors in silicon RF-ICs
No full textModern RFICs have achieved an impressively high integration level, making cross-coupling effects among different sections of the circuit a potential limit to their func-tionality. Integrated spiral inductors are a potential source of EM interference. This paper presents a physical equivalent circuit for the accurate wideband modeling of coupling be-tween spiral inductors in CMOS technology, validated by experiments performed on custom test structures. The model proves to be very accurate up to frequencies well above the inductor self-resonance. A simple approximate expression for the mutual inductance is also introduced, useful for the quick estimate of cross talk between different circuit blocks
A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS
No full textA sub-harmonic architecture for wireless signal processing at Ka band is proposed resulting in IC power saving because the LO circuits operate at half frequency and no IF stage is necessary. A 65nm CMOS prototype, including High Frequency front-end, base-band amplifier and multi-phase VCO and dividers, shows: 31.5dB gain, 6.5dB NF, -17dBm IIP3, -90dBm LO re-irradiation at 24GHz, while consuming 92mW
Valutazione a lungo termine dell'endotelio corneale in pazienti affetti da retinopatia diabetica.
No full textIn pazienti affetti da retinopatia diabetica oftalmoscopicamente e biomicroscopicamente diagnosticata gli AA evidenziano le alterazioni riscontrate a livello dell'endotelio corneale tramitre microscopia a contatto.Le alterazioni endoteliali corneali sono rapportate al diverso grado di evoluzione della retinopatia diabetica associata
A Magnetically Tuned Quadrature Oscillator
No full textContinuous frequency tuning by control of the magnetic field of a transformer—capacitor tank, in a selective oscillator, is explored in this work. A quadrature generator is built connecting two identical transformer—capacitor oscillator cells in a feedback loop. The topology itself assures the currents in the transformer windings are aligned in phase, while their relative amplitude determines, via magnetic coupling, oscillators’ tank reactance,i.e., oscillation frequency. This paper introduces the idea, analyzesoscillation amplitude, frequency tuning band, phase noise, and phase accuracy, and discusses design and experiments. Prototypes,realized in 65 nm CMOS, employing MOS varactors to further extend operation bandwidth, show the following performances:3.2 GHz and 7.3 GHz minimum and maximum oscillation orequency, respectively. Phase noise figure of merit of 176.5 dBat 3.2 GHz and 170.5 dB at 6.4 GHz is observed, with 24 mWmaximum power consumption and 1.5 maximum deviation fromquadrature
A Sliding IF Receiver for mm-wave WLANs in 65nm CMOS
No full textThis paper presents a fully integrated receiver for mm-wave WLANs comprising LNA, RF mixer, quadrature IF mixers, local oscillator plus output stage for characterization, in 65 nm CMOS. The IF frequency set to 1/3 the RF frequency slides according to the received frequency. The architecture choice allows running the quadrature VCO around 20 GHz. A Phase Noise of -115 dBc/Hz @ 10 MHz offset from an equivalent LO at RF carrier is achieved with 36 mW power consumption and 12.5% frequency tuning range. The design of building blocks is discussed in details. Implemented prototypes use low-power digital devices and other measured performances are: 28 dB peak gain, 9 dB noise figure, 5 GHz RF bandwidth, -26 dBm 1-dB compression point, > 60 dB IRR. Total Power consumption is 80 mW from 1.5 V supply
A 26-Gb/s 3-D-integrated silicon photonic receiver in bicmos-55 nm and pic25g with-15.2-dbm oma sensitivity
No full textThis letter presents a 3-D-integrated 26 Gb/s opto-electrical receiver front-end. The electronic integrated circuit (EIC) is fabricated in a BiCMOS-55-nm technology, flipped and placed on top of the photonic integrated circuits (PICs) die through copper pillars. In the receiver chain, a fully differential shunt-feedback TI amplifier (FD-SF TIA) is followed by a limiting amplifiers (LAs) with embedded equalization, output driver and an automatic offset cancelation loop. The whole receiver provides a transimpedance (TI) gain of 76 dB Ω with 30-GHz bandwidth. By exploiting the FD-SF TIA with low parasitic capacitance of the Germanium dual heterojunction photo diode (Ge-PD) in the photonic die, the receiver achieves sensitivity of-15.2 dBm optical modulation amplitude (OMA) at Ge-PD and-10-dBm OMA at the single-mode fiber (SMF) optical output with bit error rate of 10-12 and PRBS 15. The sensitivity is aligned with state-of-the-art receivers employing discrete photonics and, to author's best knowledge, it is the lowest reported among published 25 Gb/s receivers exploiting silicon photonics
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