458 research outputs found
Advising students in technical projects - recognizing problem scenarios
No full textIn this paper, we consider the advisor’s role during the technical work and the thesis preparation for a student in the final phase of a course of study in an engineering education. We initially claim that there is a marked difference between the learning that takes place in regular course work and the learning ensuing from project work. Concrete differences include that• unlike the a-priori fixed curriculum of regular courses, an important aspect of a project is to define and scientifically formulate the problem itself, in which the student is to be engaged.• projects are carried out individually or in very small groups. For an interesting project, the precise outcome cannot be known in advance.• The flexible and individual nature of each project requires that time must be carefully divided and managed between defining the problem, seeking information, implementing solutions and presenting results.While students work hard during projects and advisors will do their best to support the students’ activities, it is not uncommon that a student fails to meet either his or her own expectations and/or those of the advisor. Occasionally, this is true also of students who perform brilliantly in regular courses. The goal of this paper is to relate the authors’ experiences and investigations into the project advisory process and to provide recommendations for other engineering educators.After an initial discussion of a typical engineering project advisory process, we review a number of representative projects (abstracted and anonymized) and analyze conditions under which a failure to meet or match expectations is likely to arise. This leads us to a small number of scenarios, where a student is likely to under-perform. Common to these scenarios is a lack of balance between the necessary activities in an engineering project. As our main contribution, we investigate and categorize these imbalances leading to the aforementioned scenarios. Finally, we distill suggestions for best project advisory practices.<br/
Precise and diffraction-limited waveguide-to-free-space focusing gratings
No full textWe present the design and characterization of waveguide grating devices that couple visible-wavelength light at λ = 674 nm from single-mode, high index-contrast dielectric waveguides to free-space beams forming micron-scale diffraction-limited spots a designed distance and angle from the grating. With a view to application in spatially-selective optical addressing, and in contrast to previous work on similar devices, deviations from the main Gaussian lobe up to 25 microns from the focus and down to the 5 × 10[superscript -6] level in relative intensity are characterized as well; we show that along one dimension the intensity of these weak sidelobes approaches the limit imposed by diffraction from the finite field extent in the grating region. Additionally, we characterize the polarization purity in the focal region, observing at the center of the focus a low impurity < 3 × 10[superscript -4] in relative intensity. Our approach allows quick, intuitive design of devices with such performance, which may be applied in trapped-ion quantum information processing and generally in any systems requiring optical routing to or from objects 10 s-100 s of microns from a chip surface, but benefitting from the parallelism and density of planar-fabricated dielectric integrated optics.National Science Foundation (U.S.) (Program ECCS-1408495
Factorization of isometries of hyperbolic 4-space and a discreteness condition:
No full textGilman's NSDC condition is a sufficient condition for the discreteness of a two generator subgroup of PSL(2,C). We address the question of the extension of this condition to subgroups of isometries of hyperbolic 4-space. While making this new construction, namely the NSDS condition, we are led to ask whether every orientation preserving isometry of hyperbolic 4-space can be factored into the product of two half-turns. We use some techniques developed by Wilker to first, define a half-turn suitably in dimension 4 and then answer the former question. It turns out that defining a half-turn in this way in any dimension n enables us to generalize some of Gilman's theorems to dimension greater than or equal to 4. We also give an exposition on part of Wilker's work and give new proofs for some of his results.Ph.D.Includes bibliographical references (p. 52-53)by Karan Mohan Pur
Two-photon absorption detection of infrared light in silicon optical resonators
No full textThesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Cataloged from student-submitted PDF version of thesis.Includes bibliographical references (p. [107]-115).The challenge of overcoming energy efficiency and bandwidth limitations in interconnects between components in computer systems (e.g. between memory and processors) has motivated the development of short-range optical interconnects, which in many approaches require optical devices and waveguides fabricated within the same CMOS environments as the electronics. This thesis centers on developing photodetectors for infrared light within the silicon of commercial CMOS processes; silicon's lack of strong absorption at the wavelengths of interest makes this challenging. The approach uses defect-state mediated linear absorption and two-photon absorption (TPA) in small mode-volume resonators to generate photocarriers. Such resonators allow efficient linear absorption in short devices despite low absorption coefficients, and a greater TPA rate than in bulk material due to the large energy densities achievable. The devices here are made in the polysilicon layer of a commercial DRAM process, and characterization of this material, different from crystalline Si in both its linear and nonlinear absorption, forms a starting point. The design, fabrication, and testing of electrically addressable photonic crystal resonators subject to the constraints associated with working in a CMOS process are then presented. The best resonators made were able to reach Qs of 70,000, limited by linear loss in the polysilicon. Linear absorption is dominant in the devices made to date, and allowed quantum efficiencies of a few tens of percent on resonance. However, high biases of around -20 V were required to achieve these QEs, and the bandwidth of the devices was limited to only approximately 500 MHz. Improvements to the electrical structure of the devices are likely to improve these characteristics. The ability to fabricate high-Q photonic crystal resonators within full CMOS flows, and the QEs allowed by defect-assisted absorption in the devices measured, indicate promise for this approach to photodetection in integrated CMOS photonic systems.by Karan K. Mehta.S.M
Integrated optical quantum manipulation and measurement of trapped ions
No full textThesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Cataloged from student-submitted PDF version of thesis.Includes bibliographical references (pages [165]-183).Individual atomic ions confined in designed electromagnetic potentials and manipulated via lasers are strong candidates as physical bases for quantum information processing (QIP). This is in large part due to their long coherence times, in distinguishability, and strong Coulomb interactions. Much work in recent years has utilized these properties to implement increasingly precise quantum operations essential for QIP, as well as to conduct increasingly sophisticated experiments on few-ion systems. Many questions remain however regarding how to implement the significant classical apparatus required to control and measure many ions (and indeed any physical qubit under study) in a scalable way that furthermore does not compromise qubit quality. This work draws on techniques in integrated optics to address this question. Planar-fabricated waveguides and gratings integrated with planar ion traps are demonstrated to allow optical addressing of individual 88Sr+ions 50 [mu]m above the chip surface with distraction-limited focused beams, with advantages in stability and scalability. Motivated by the requirement for low crosstalk in qubit addressing, we show also that intuitively designed devices can generate precisely tailored intensity profiles at the ion locations, with distraction-limited side lobe intensities characterized to the 5x10-6 level in relative intensity up to 25 [mu]m from the focus. Such devices can be implemented alongside complex systems in complementary metal-oxide-semiconductor (CMOS) processes. We show in addition that the multiple patternable metal layers present in CMOS processes can be used to create complex planar ion traps with performance comparable to simple single-layer traps, and that CMOS silicon avalanche photodiodes may be employed for scalable quantum state readout. Finally we show initial results on integrated electro-optic modulators for visible light. These results open possibilities for experiments with trapped ions in the short term, and indicate routes to achieving large-scale systems of thousands or more ions in the future. Though ion qubits may seem isolated from scalable solid-state technologies, it appears this apparent isolation may uniquely allow a cooperation with complex planar-fabricated optical and electronic systems without introducing additional decoherence.by Karan K. Mehta.Ph. D
High-speed polysilicon CMOS photodetector for telecom and datacom
No full textAbsorption by mid-bandgap states in polysilicon or heavily implanted silicon has been previously utilized to implement guided-wave infrared photodetectors in CMOS compatible photonic platforms. Here, we demonstrate a resonant guided-wave photodetector based on the polysilicon layer that is used for the transistor gate in a microelectronic SOI CMOS process without any change to the foundry process flow (“zero-change” CMOS). Through a combination of doping mask layers, a lateral pn junction diode in the polysilicon is demonstrated with a strong electric field to enable efficient photo-carrier extraction and high-speed operation. This photodetector has a responsivity of more than 0.14 A/W from 1300 to 1600 nm, a 10 GHz bandwidth, and 80 nA dark current at 15 V reverse bias.United States. Defense Advanced Research Projects Agency (Award HR0011-11-C-0100)United States. Defense Advanced Research Projects Agency (Contract HR0011- 11-9-0009
Design of Wideband Direct-Conversion Receiver for 5G Wireless Applications
No full textThis thesis presents the design of a wideband direct-conversion receiver in 28nm CMOS technology as part of the heterogeneous transceiver for 5G wireless applications. The receiver down-converts the RF signal from the 7 GHz IF frequency to baseband. One of the key challenges for the receiver is the wide baseband bandwidth in the order of GHz, which makes the design of the receiver's baseband section particularly demanding. Furthermore, as the number of bands and antennas (MIMO) increases, the number of external RF filters must be reduced, which imposes strict linearity requirements since the receiver must handle powerful out-of-band blockers. The presented receiver covers RF channel bandwidths ranging from 50 MHz to 2 GHz that belong to 5G-FR2 bands. The voltage gain of the receiver is 45 dB and can be programmed down to 0 dB. It has a baseband bandwidth of 25 MHz to 1 GHz and more than 33 dB OOB selectivity at a frequency 4 times the band edge, consistent with 5G specifications. For maximum gain, the receiver has a noise figure of 5.6 dB and a slope of less than 0.7 dB/dB in the noise increase as the gain decreases. For any gain configuration, the receiver displays a measured in-band OIP3 of greater than +23dBm. The power consumption is 68 mW at maximum receiver gain and 56 mW at minimum receiver gain. The receiver has been fully integrated and measurement results are fully complying with the design specifications. The receiver front-end is composed of two cascaded LNTAs based on a common-gate transformer-based architecture. It achieves wideband matching from 5 GHz to 9 GHz, a high RF gain of 80 mS, and gain variability of 31 dB. The LNTA drives a double-balanced passive mixer. Two baseband paths are used to cover the very wide bandwidth range required. The first consists of a Rauch filter followed by a first order TIA and is used to cover baseband channel bandwidth from 25 MHz to 200 MHz. The second consists of an open loop second order filter followed by a wideband filtering TIA and covers channel baseband bandwidth from 400 MHz to 1 GHz. The primary contribution of the author in the baseband section is the design of the open loop filter which provide second order low pass filtering in the current domain. The filter, based on a regulated cascode architecture, achieves a bandwidth up to 1 GHz and a gain variability of 14 dB, which is compliant with the receiver specifications. A frequency dependent negative capacitance is connected at the filter input to improves the filter Q and provides an out-of-band selectivity equivalent to a 3rd-order Butterworth filter. In addition, different negative capacitance circuits have been studied including a novel frequency dependent negative capacitance circuit which provides negative in-band capacitance and positive out-of-band capacitance. Such a solution further improves the Q and selectivity of the filter. The filter was tested as a stand-alone block providing an in-band IIP3 of +16dBm, which is two times higher compared to state-of-the-art wideband open loop filters with comparable noise and power dissipation.This thesis presents the design of a wideband direct-conversion receiver in 28nm CMOS technology as part of the heterogeneous transceiver for 5G wireless applications. The receiver down-converts the RF signal from the 7 GHz IF frequency to baseband. One of the key challenges for the receiver is the wide baseband bandwidth in the order of GHz, which makes the design of the receiver's baseband section particularly demanding. Furthermore, as the number of bands and antennas (MIMO) increases, the number of external RF filters must be reduced, which imposes strict linearity requirements since the receiver must handle powerful out-of-band blockers. The presented receiver covers RF channel bandwidths ranging from 50 MHz to 2 GHz that belong to 5G-FR2 bands. The voltage gain of the receiver is 45 dB and can be programmed down to 0 dB. It has a baseband bandwidth of 25 MHz to 1 GHz and more than 33 dB OOB selectivity at a frequency 4 times the band edge, consistent with 5G specifications. For maximum gain, the receiver has a noise figure of 5.6 dB and a slope of less than 0.7 dB/dB in the noise increase as the gain decreases. For any gain configuration, the receiver displays a measured in-band OIP3 of greater than +23dBm. The power consumption is 68 mW at maximum receiver gain and 56 mW at minimum receiver gain. The receiver has been fully integrated and measurement results are fully complying with the design specifications. The receiver front-end is composed of two cascaded LNTAs based on a common-gate transformer-based architecture. It achieves wideband matching from 5 GHz to 9 GHz, a high RF gain of 80 mS, and gain variability of 31 dB. The LNTA drives a double-balanced passive mixer. Two baseband paths are used to cover the very wide bandwidth range required. The first consists of a Rauch filter followed by a first order TIA and is used to cover baseband channel bandwidth from 25 MHz to 200 MHz. The second consists of an open loop second order filter followed by a wideband filtering TIA and covers channel baseband bandwidth from 400 MHz to 1 GHz. The primary contribution of the author in the baseband section is the design of the open loop filter which provide second order low pass filtering in the current domain. The filter, based on a regulated cascode architecture, achieves a bandwidth up to 1 GHz and a gain variability of 14 dB, which is compliant with the receiver specifications. A frequency dependent negative capacitance is connected at the filter input to improves the filter Q and provides an out-of-band selectivity equivalent to a 3rd-order Butterworth filter. In addition, different negative capacitance circuits have been studied including a novel frequency dependent negative capacitance circuit which provides negative in-band capacitance and positive out-of-band capacitance. Such a solution further improves the Q and selectivity of the filter. The filter was tested as a stand-alone block providing an in-band IIP3 of +16dBm, which is two times higher compared to state-of-the-art wideband open loop filters with comparable noise and power dissipation
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