1,721,093 research outputs found

    Parylene C topographic micropattern as a template for patterning PDMS and Polyacrylamide hydrogel

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    Parylene C is a well-known polymer and it has been mainly employed as a protective layer for implantable electronics. In this paper, we propose a new approach to use Parylene C as a versatile template for patterning soft materials potentially applicable as scaffolds in cardiac tissue engineering (TE). Parylene C substrates were anisotropically patterned through standard lithographic process with hydrophilic channels separating raised hydrophobic strips. Ridges and grooves of the template are 10 µm width and depth ranging from 1 to 17 µm. Polydimethylsiloxane (PDMS) and Polyacrylamide (PAm) hydrogel have been chosen as soft polymers to be moulded. Thanks to their chemical and physical properties PDMS and PAm hydrogel mimic the extracellular matrix (ECM). PDMS was spin coated on micropatterned Parylene C obtaining composite substrates with 460 nm and 1.15 µm high grooves. The Young’s modulus of the composite Parylene C/PDMS was evaluated and it was found to be almost halfwhen compared to PDMS. PAm hydrogel was also printed using collagen coated micro-grooved Parylene C. Optical micrographs and fluorescence analysis show the successful topographic and protein pattern transfer on the hydrogel

    An experimental technique for characterizing slow-wave characteristics of MIS-like transmission lines using aqueous dielectrics

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    This work is a study of the dielectric propagation properties of laminar substrates, which are known to support low dispersion modes with very small phase velocities. Slow modes are linked to a polarization mode supported by the insulator-semiconductor interface. The mode spectrum of metal-insulator-semiconductor lines is controlled by the substrate resistivity and the ratio of the semiconductor to insulator layer thicknesses. An experimental investigation of substrate modes normally requires the laborious fabrication of many specimens to cover a useful range of parameter variation. In this paper, we present an experimental platform that supports slow-wave propagation and allows easy adjustment of the parameters affecting the interfacial polarization mechanism

    Dataset for Magnetic stimulation in the microscale: the development of a 6x6 array of micro-coils for stimulation of excitable cells in vitro

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    Datasets used in figures of the article named &quot;Magnetic stimulation in the microscale: the development of a 6x6 array of micro-coils for stimulation of excitable cells in vitro&quot; submitted in Biomedical Physics and Engineering Express.</span

    Seamlessly Fused Digital-Analogue Reconfigurable Computing using Memristors

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    Dataset supports: Serb, A. at al (2018). Seamlessly Fused Digital-Analogue Reconfigurable Computing using Memristors. Nature Communications. Each zip file contains the data for an individual figure (FX, where X is the figure number) or supplementary figure (SFX). Within each zip file there is a bespoke documentation for each panel of the figure, which also covers the contents of each individual file within the zip directory.</span

    Seamlessly fused digital-analogue reconfigurable computing using memristors

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    As the world enters the age of ubiquitous computing, the need for reconfigurable hardware operating close to the fundamental limits of energy consumption becomes increasingly pressing. Simultaneously, scaling-driven performance improvements within the framework of traditional analogue and digital design become progressively more restricted by fundamental physical constraints. Emerging nanoelectronics technologies bring forth new prospects yet a significant rethink of electronics design is required for realising their full potential. Here, we lay the foundations of a design approach that fuses analogue and digital thinking by combining digital electronics with analogue memristive devices for achieving charge-based computation; information processing where every dissipated charge counts. This is realised by introducing memristive devices into standard logic gates, thus rendering them reconfigurable and capable of performing analogue computation at a power cost close to digital. The versatility and benefits of our approach are experimentally showcased through a hardware data clusterer and an analogue NAND gate.<br/

    Dataset for A computationally efficient Verilog-A ReRAM model (v.2)

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    This is an updated version of the data set for paper of same name. (The previous version has a DOI of 10.5258/SOTON/D0082). This is a Verilog-A ReRAM model that corresponds to the behavior of a physical TiO2-based sample manufactured in Nano Group, ECS, University of Southampton. The model is ready for use and can be compiled in any electronics circuit simulator that supports Verilog-A models. A minor version change to v.2.1 occured on 3/1/2018 (see Change Log).</span

    An RRAM biasing parameter optimizer

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    Research on memory devices is a highly active field, and many new technologies are being constantly developed. However, characterizing them and understanding how to bias for optimal performance are becoming an increasingly tight bottleneck. Here, we propose a novel technique for extracting biasing parameters, conducive to desirable switching behavior in a highly automated manner, thereby shortening the process development cycles. The principle of operation is based on: 1) applying variable amplitude, pulse-mode stimulation on a test device in order to induce switching multiple times; 2) collecting the data on how pulsing parameters affect the device’s resistive state; and 3) choosing the most suitable biasing parameters for the application at hand. The utility of the proposed technique is validated on TiOx-based prototypes, where we demonstrate the successful extraction of biasing parameters that allow the operation of our devices both as multistate and binary resistive switches
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