202 research outputs found
Fabrication of single or multiple gate field plates
No full text"This invention relates to semiconductor devices, and more particularly, to the fabrication of single or
multiple gate field plates.
シングルゲートまたはマルチゲートフィールドプレート製造
No full text電界効果型トランジスタの表面に、誘電性材料の堆積/成長させ、誘電性材料をエッチングし、および、メタルを蒸着させる、連続的なステップを用いる、シングルゲートまたはマルチゲートプレートの製造プロセス。本製造プロセスのは、誘電性材料の堆積/成長が、典型的には、非常によく制御できるプロセスなので、フィールドプレート動作を厳しく制御できる。さらに、デバイス表面に堆積された誘電性材料は、デバイスの真性領域から除去される必要はない。このため、乾式または湿式のエッチングプロセスで受けるダメージの少ない材料を用いることなく、フィールドプレートされたデバイスを、実現することができる。マルチゲートフィールドプレートを使うと、マルチ接続を使用するので、ゲート抵抗を減らすこともでき、こうして、大周辺デバイスおよび/またはサブミクロンゲートデバイスの性能を向上することができる。Single gate or multi-gate plate manufacturing process using sequential steps of depositing / growing dielectric material, etching dielectric material, and depositing metal on the surface of a field effect transistor. Since the manufacturing process is typically a process where the deposition / growth of the dielectric material is very well controlled, field plate operation can be tightly controlled. Furthermore, the dielectric material deposited on the device surface need not be removed from the intrinsic region of the device. For this reason, a field-plated device can be realized without using a material that is less damaged by a dry or wet etching process. Using multi-gate field plates can also reduce gate resistance because of the use of multiple connections, thus improving the performance of large peripheral devices and / or sub-micron gate devices
Fabrication of single or multiple gate field plates
No full textA process for fabricating single or multiple gate field plates using consecutive steps of dielectric material deposition/growth, dielectric material etch and metal evaporation on the surface of a field effect transistors. This fabrication process permits a tight control on the field plate operation since dielectric material deposition/growth is typically a well controllable process. Moreover, the dielectric material deposited on the device surface does not need to be removed from the device intrinsic regions: this essentially enables the realization of field-plated devices without the need of low-damage dielectric material dry/wet etches. Using multiple gate field plates also reduces gate resistance by multiple connections, thus improving performances of large periphery and/or sub-micron gate devices
Fabrication of single or multiple gate field plates
No full textA process for fabricating single or multiple gate field plates using consecutive steps of dielectric material deposition/growth, dielectric material etch and metal evaporation on the surface of a field effect transistors. This fabrication process permits a tight control on the field plate operation since dielectric material deposition/growth is typically a well controllable process. Moreover, the dielectric material deposited on the device surface does not need to be removed from the device intrinsic regions: this essentially enables the realization of field-plated devices without the need of low-damage dielectric material dry/wet etches. Using multiple gate field plates also reduces gate resistance by multiple connections, thus improving performances of large periphery and/or sub-micron gate devices
단일 또는 다중 게이트 필드 플레이트의 제조
No full text본 발명은 전계 효과 트랜지스터의 표면에 절연 물질 증착 또는 성장, 절연 물질 식각 및 금속 증발의 연속된 단계를 사용한 단일 또는 다중 게이트 필드 플레이트의 제조 방법에 관한 것이다. 이 제조 방법은 절연 물질의 증착/성장이 전형적으로 잘 제어가능한 방법이므로 필드 플레이트 작동시 엄격한 제어를 허용한다. 게다가, 소자 표면에 증착된 절연 물질은 소자 고유 영역으로부터 제거될 필요가 없으며, 이는 전형적으로 저손상 절연 물질의 건식/습식 식각법의 필요 없이 필드-플레이팅된 소자의 구현을 가능하게 한다. 다중 게이트 필드 플레이트의 사용은 다중 접속을 통해 게이트 저항을 감소시키므로 대형 주변부 및/또는 초미세한 게이트 소자들의 성능을 향상시킨다.The present invention relates to a method of making single or multiple gate field plates using successive steps of deposition or growth of insulating material, etching of insulating material and metal evaporation on the surface of a field effect transistor. This manufacturing method allows for tight control in field plate operation since the deposition / growth of insulating material is typically a well controllable method. In addition, the insulating material deposited on the device surface does not need to be removed from the device intrinsic region, which typically enables the implementation of field-plated devices without the need for dry / wet etching of low damage insulating materials. The use of multiple gate field plates reduces gate resistance through multiple connections, thus improving the performance of large peripheral and / or ultrafine gate devices
Fabrication of single or multiple gate field plates
No full textA process for fabricating single or multiple gate field plates using consecutive steps of dielectric material deposition/growth, dielectric material etch and metal evaporation on the surface of a field effect transistors. This fabrication process permits a tight control on the field plate operation since dielectric material deposition/growth is typically a well controllable process. Moreover, the dielectric material deposited on the device surface does not need to be removed from the device intrinsic regions: this essentially enables the realization of field-plated devices without the need of low-damage dielectric material dry/wet etches. Using multiple gate field plates also reduces gate resistance by multiple connections, thus improving performances of large periphery and/or sub-micron gate devices
單一或多重閘極場平板之製造
No full text本發明係關於半導體裝置,且更特定言之,本發明係關於單一或多重閘極場平板之製造。This invention relates to semiconductor devices and, more particularly, to the fabrication of single or multiple gate field plates
单个或多个栅极场板的制造
No full text一种制造单个或多个栅极场板的方法,其利用了下列连续步骤:在场效应晶体管表面上进行介电材料沉积/生长、介电材料蚀刻以及金属蒸镀。由于介电材料沉积/生长是一种充分可控的处理,因此这种制造方法允许对场板工作进行严格控制。而且,沉积在器件表面上的介电材料无需从器件本征区中去除:这实质上使得无需低损伤介电材料干法/湿法蚀刻便能实现场板器件。使用多个栅极场板还通过多个连接来减少栅极电阻,从而改善了大周边和/或亚微米栅器件的性能。A kind of method of making single or multiple grid field plates, it has utilized following consecutive steps: carry out dielectric deposition/growth, dielectric material etching and metal evaporation on the field-effect transistor surface.Because dielectric deposition/growth is a kind of fully controlled processing, therefore this manufacture method allows strictness control is carried out in field plate work.And the dielectric material that is deposited on the device surface need not to remove from device intrinsic: this makes that in fact need not the etching of low damage dielectric material dry/wet just can realize field plate device.Use a plurality of grid field plates also to reduce resistance, thereby improved the performance of big periphery and/or submicron gate device by a plurality of connections
單一或多重閘極場平板之製造
No full text本發明係關於半導體裝置,且更特定言之,本發明係關於單一或多重閘極場平板之製造。This invention relates to semiconductor devices and, more particularly, to the fabrication of single or multiple gate field plates
Ovarian steroid cell tumor in pregnancy-a rare occurrence: Report of a case and review of the literature
No full textBackground: Steroid-cell tumors of the ovary are very rare, especially during pregnancy, and they must be distinguished from luteoma of pregnancy.
Case: An 18-year-old female, gravida 3, para 1-0-1-1, at 38 weeks' of gestation, had an adnexal mass that was discovered incidentally during a Caesarean section. The tumor was excised and her male infant was normal.
Results: Histologic workup revealed the tumor to be a steroid-cell tumor, which is exceedingly rare in pregnancy.
Conclusions: Ovarian steroid-cell tumors, which are malignant one-third of the time, are difficult to distinguish from luteoma of pregnancy.Peer reviewe
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