326,132 research outputs found
CD30, Th2 cytokines and HIV infection: a complex and fashinating link
CD30 is a member of the tumor necrosis factor (TNF)/nerve growth factor (NGF) receptor superfamily, and was originally described as a marker of Hodgkin's and Reed-Sternberg cells in Hodgkin's lymphoma. CD30 is preferentially expressed on CD4+ and CD8+ T-cell clones that produce T helper 2 (Th2)-type cytokines, and is also released in a soluble form by these cells. Elevated serum levels of soluble (s)CD30 have been found in some conditions in which a pathogenic role for Th2 cells has been suggested, such as atopy, Omenn's syndrome, systemic lupus erythematosus, as well as following infection with measles virus or human immuno-deficiency virus (HIV). Here, Gianfranco Del Prete and colleagues suggest a complex and fascinating link between the expression and release of CD30, and the immunopathogenesis of HIV infection
A Cache-aware program transformation technique suitable for embedded systems
In embedded systems caches are very precious for keeping low the memory bandwidth and to allow employing slow and narrow off-chip devices. Conversely, the power and die size resources consumed by the cache force the embedded system designers to use small and simple cache memories. This kind of caches can experience poor performance because of their not flexible placement policy. In this scenario, a big fraction of the misses can originate from the mismatch between the cache behavior and the memory accesses' locality features (conflict misses). In this paper we analyze the conflict miss phenomenon and define a cache utilization measure. Then we propose an object level Cache Aware allocation Technique (CAT) to transform the application to fit the cache structure, minimize the number of conflict misses and maximize cache exploitation. The solution transforms the program layout using the standard functionalities of a linker. The CAT approach allowed the considered applications to deliver the same performance on two times and sometimes four times smaller caches. Moreover the CAT improved programs on direct-mapped caches outperformed the original versions on set-associative caches. In this way, the results highlight that our approach can help embedded system designers to meet the system requirements with smaller and simpler cache memories. (C) 2002 Elsevier Science B.V. All rights reserved
Functional validation of novel Se and S alkyl precursors for the low temperature pyrolytic MOVPE
We report on the pyrolytic metalorganic vapour phase epitaxy of ZnSe, ZnS and ZnSSe by using diethyldisulphide [(C2H5)(2)S-2] and dimethyldiselenide [(CH3)(2)Se-2], these dialkyls being suitable for the low (<400°C) temperature growth of S- and Se-based compounds. (C2H5)(2)S-2 and (CH3)(2)Se-2 allow a substantial reduction of ZnSe and ZnS growth temperatures with respect to diethylsulphide and dimethylselenide. Mass spectrometry (MS) fragmentation products of (C2H5)(2)S-2 and (CH3)(2)Se-2 molecular ions are studied to investigate the relative strengths of specific bonds in the molecules and to identify their decomposition paths. The decomposition of (C2H5)(2)S-2 occurs mainly via the loss of ethylene molecules through beta-hydrogen elimination reactions. On the contrary, the sequential loss of methyl radicals seems the dominant path of (CH3)(2)Se-2, beta-like hydrogen elimination reactions being still possible, although less likely than for (C2H5)(2)S-2. The occurrence of a peculiar CH3. transposition reaction is also suggested for (CH3)(2)Se-2. Weak or negligible [for (C2H5)(2)S-2] contributions to the alkyl mass spectra are observed from Se-Se or S-S bond cleavage. This is ascribed to the strength of the Se-Se (or S-S) bond in the (CH3)(2)Se-2 [(C2H5)(2)S-2] molecule, which would destabilise the Se-C (S-C) bonds, leading to the alkyl low thermal stability. Low H concentrations, i.e. (1-3) x 10(17) cm(-3), are found by secondary ion MS in ZnSe samples and attributed to the low proclivity of (CH3)(2)Se-2 to decompose through beta-like hydrogen reactions
Indulgence prayer card to St. Giulo Prete, 1857 [picture] /
Title devised by cataloguer.; In: Album of Miss Eliza Younghusband, South Australia, 1856-1865.; Inscriptions: "Rebel, Sculpsit., S. Giulio Prete, il cui Sacro Corpo si venera nella insigne Basilica dell' Isola di S. Giulio"--Below image.; Condition: Creased, sl. tears at edges.; Also available in an electronic version via the Internet at: http://nla.gov.au/nla.pic-vn4189024-s53
Optimizing the Instruction Cache Performance of Embedded Systems
In the embedded domain, the gap between memory and processor performance and the increase in application complexity need to be supported without wasting precious system resources: die size, power, etc. For these reasons, effective exploitation of small and simple cache memories is of the utmost importance. However, programs running on such caches can experience serious inefficiencies due to cache conflicts.We present a new Cache-Aware Code Allocation Technique (CAT), which transforms the structure of programs so that their behavior toward memory can meet the locality features the cache is able to exploit. The proposed approach uses detailed information of program execution to place program areas into memory and employs the new idea of “look-forward estimation” that helps to seek better global layouts during the placement of each area. CAT-optimized programs outperform the original ones achieving the same miss rate on two times, and sometimes four times, smaller caches. Moreover, CAT improves the instruction miss rate by more than 40% if compared to the best procedure-reordering algorithm. CAT performances derive from the increased number of cache lines that support the execution of optimized applications and from a more balanced load on them
Optimizing instruction cache performance of embedded systems
In the embedded domain, the gap between memory and processor performance and the increase in application complexity need to be supported without wasting precious system resources: die size, power, etc. For these reasons, effective exploitation of small and simple cache memories is of the utmost importance. However, programs running on such caches can experience serious inefficiencies due to cache conflicts.
We present a new Cache-Aware Code Allocation Technique (CAT), which transforms the structure of programs so that their behavior toward memory can meet the locality features the cache
is able to exploit. The proposed approach uses detailed information of program execution to place program areas into memory and employs the new idea of “look-forward estimation” that helps to seek better global layouts during the placement of each area. CAT-optimized programs outperform the original ones achieving the same miss rate on two times, and sometimes four times, smaller caches. Moreover, CAT improves the instruction miss rate by more than 40% if compared to the best procedure-reordering algorithm. CAT performances derive from the increased number of cache lines that support the execution of optimized applications and from a more balanced load on them
Don Pietro Boifava: prete patriota
Don Pietro Boifava (1794-1879) è uno di quei personaggi che, pur con quell’umiltà che lo ha sempre contraddistinto, è entrato nella storia con la ‘s’ maiuscola, uscendo dal contesto provinciale nel quale la sua amata Serle, piccolo paese “disperso” nelle montagne bresciane, avrebbe potuto relegarlo. il nome di don Pietro Boifava e la sua importanza storica si legano indissolubilmente alle vicende della Prima Guerra d’Indipendenza, in particolare a quelle dieci giornate della primavera del 1849 che recarono alla città di Brescia l’appellativo di “leonessa d’Italia”. È qui che si erge la figura del “prete soldato”, patriota italiano
Direzione e forme organizzative dell'internazionalizzazione delle banche italiane: un'analisi panel
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