4 research outputs found
A modular approach for testable conservative reversible multiplexer circuit for nano-electronic confine application
No full textDifferentially regulated gene expression in quiescence versus senescence and identification of ARID5A as a quiescence associated marker
No full textIn multicellular organisms majority of the cells remain in a non-dividing states of either quiescence (reversible) or senescence (irreversible). In the present study, gene expression signatures unique to quiescence and senescence were identified using microarray in osteosarcoma cell line, U2OS. It was noted that certain genes and pathways like NOD pathway was shared by both the growth arrest conditions. A major highlight of the present study was increased expression of number of chemokines and cytokines in both quiescence and senescence. While senescence-associated secretory phenotype (SASP) is well known, the quiescence-associated secretory phenotype (QASP) is relatively unknown and appeared novel in this study. ARID5A, a subunit of SWI/SNF complex was identified as a quiescence associated gene. The endogenous expression of ARID5A increased during serum starved condition of quiescence. Overexpression of ARID5A resulted in more number of cells in G0/G1 phase of cell cycle. Further ARID5A overexpressing cells when subjected to serum starvation showed a pronounced secretory phenotype. Overall, the present work has identified gene expression signatures which can distinguish quiescence from senescence
Processor Design and Application of Futuristic
No full textMany devices consist of low-power processor. Quantum-dot-cellular-automata (QCA) based processor designs provide enhanced performance compared with conventional metal-oxide-semiconductor (MOS) based processors. Nanocomputing-based processors are often energy-efficient. We have developed Nanotechnology QCA-based different subcomponents of processor such as 2-to-4 decoder, 3-to-8 decoder, Delay Flip-flop (D-FF), and sequence counter. A potential energy proof has been measured in the 2-to-4 decoder design. The synthesis approach algorithm has been presented for all designs. Further, the potential energy calculation results show for 2-to-4 decoder. According to the synthesis results 2-to-4 decoder has improved 82.3% cell count, 86% area, and 85% latency over previous work. Comparing the primitive results with the prior one, results improved by 64% and 76% in terms of cell count and area in the design of the 3-to-8 decoder. Among the different components of the processor is D-FF, which has an improvement of 66.37% in cell counts and 62.5% in area over the prior design. Primitive results have improved, including latency, cell count, and area, showing the proposed processor design is comparable to lowpower devices and high speed. In terms of balance power, the proposed subcomponent of the processor will benefit low power device.Emerging Sources Citation Inde
NANOTECHNOLOGY QCA-BASED SUB-COMPONENTS OF PROCESSOR DESIGN AND APPLICATION OF FUTURISTIC LOW-POWER DESIGN
No full textMany devices consist of low-power processor. Quantum-dot-cellular-automata (QCA) based processor designs provide enhanced performance compared with conventional metal-oxide-semiconductor (MOS) based processors. Nanocomputing-based processors are often energy-efficient. We have developed Nanotechnology QCA-based different sub-components of processor such as 2-to-4 decoder, 3-to-8 decoder, Delay Flip-flop (D-FF), and sequence counter. A potential energy proof has been measured in the 2-to-4 decoder design. The synthesis approach algorithm has been presented for all designs. Further, the potential energy calculation results show for 2-to-4 decoder. According to the synthesis results 2-to-4 decoder has improved 82.3% cell count, 86% area, and 85% latency over previous work. Comparing the primitive results with the prior one, results improved by 64% and 76% in terms of cell count and area in the design of the 3-to-8 decoder. Among the different components of the processor is D-FF, which has an improvement of 66.37% in cell counts and 62.5% in area over the prior design. Primitive results have improved, including latency, cell count, and area, showing the proposed processor design is comparable to low-power devices and high speed. In terms of balance power, the proposed subcomponent of the processor will benefit low power device
