1,720,972 research outputs found

    Digital architectures implementing piecewise-affine functions: An overview

    No full text
    In this paper we review and discuss digital circuit architectures implementing piecewise-affine (PWA) functions. These functions are defined over domains that are partitioned (either uniformly or non-uniformly) in polyhedral regions: each PWA function is linear in a polyhedral region. Different solutions, concerning both regular and non-regular domain partitions, are compared in terms of complexity and performances. Measurement results are provided for FPGA implementations. Two examples of control applications are described. On the overall, the goal of this paper is to provide a compact exposition of the state-of-the-art methods for the digital circuit implementation of PWA functions that is accessible to both experts and non-experts

    Integrated circuit implementation of multi-dimensional piecewise-linear functions

    No full text
    In this paper we present an integrated circuit implementing piecewise-linear (PWL) functions with three inputs, where each input can be either analog or digital. The PWL function to be implemented can be chosen by properly storing a set of coefficients in a 4 kB external memory. Experimental results are shown that demonstrate the circuit working up to 50 MHz with a maximum power consumption of 3.7 mW. Measurements corresponding to both static and time-varying inputs are provided and discussed

    Integrated circuit implementation of multi-dimensional piecewise-linear functions

    Full text link
    In this paper we present an integrated circuit implementing piecewise-linear (PWL) functions with three inputs, where each input can be either analog or digital. The PWL function to be implemented can be chosen by properly storing a set of coefficients in a 4 kB external memory. Experimental results are shown that demonstrate the circuit working up to 50 MHz with a maximum power consumption of 3.7 mW. Measurements corresponding to both static and time-varying inputs are provided and discussed. © 2010 Elsevier Inc. All rights reserved.Fil: Di Federico, Martin. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages". Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages"; ArgentinaFil: Poggi, Tomaso. Università degli Studi di Genova; ItaliaFil: Julian, Pedro Marcelo. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages". Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages"; ArgentinaFil: Storace, Marco. Università degli Studi di Genova; Itali

    Circuit implementation of piecewise-affine functions based on a binary search tree

    No full text
    In this paper we introduce a digital architecture implementing piecewise-affine functions defined over domains partitioned into polytopes: the functions are linear affine over each polytope. The polytope containing the input vector is found by exploring a previously constructed binary search tree. Once the polytope is detected, the function is evaluated by addressing an affine map whose coefficients are stored in a memory. The architecture has been implemented on FPGA and experimental results for a benchmark example are shown

    High-Speed piecewise affine virtual sensors

    No full text
    This paper proposes piecewise affine (PWA) virtual sensors for the estimation of unmeasured variables of nonlinear systems with unknown dynamics. The estimation functions are designed directly from measured inputs and outputs and have two important features. First, they enjoy convergence and optimality properties, based on classical results on parametric identification. Second, the PWA structure is based on a simplicial partition of the measurement space and allows one to implement very effectively the virtual sensor on a digital circuit. Due to the low cost of the required hardware for the implementation of such a particular structure and to the very high sampling frequencies that can be achieved, the approach is applicable to a wide range of industrial problems

    Synthesis of stabilizing model predictive controllers via canonical piecewise affine approximations

    No full text
    This paper proposes the use of canonical piecewise affine (PWA) functions for the approximation of linear MPC controllers over a regular simplicial partition of a given set of states of interest. Analysis tools based on the construction of PWA Lyapunov functions are provided for certifying the asymptotic stability of the resulting closed-loop system. The main advantage of the proposed controller synthesis approach is that the resulting stabilizing approximate MPC controller can be implemented on chip with sampling times in the order of tens of nanoseconds

    Ultra-fast stabilizing model predictive control via canonical piecewise affine approximations

    No full text
    This paper investigates the use of canonical piecewise affine (PWA) functions for approximation and fast implementation of linear MPC controllers. The control law is approximated in an optimal way over a regular simplicial partition of a given set of states of interest. The stability properties of the resulting closed-loop system are analyzed by constructing a suitable PWA Lyapunov function. The main advantage of the proposed approach to the implementation of MPC controllers is that the resulting stabilizing approximate MPC controller can be implemented on chip with sampling times in the order of tens of nanoseconds

    Experimental bifurcation diagram of a circuit-implemented neuron model

    No full text
    An experimental bifurcation diagram of a circuit implementing an approximation of the Hindmarsh-Rose (HR) neuron model is presented. Measured asymptotic time series of circuit voltages are automatically classified through an ad hoc algorithm. The resulting two-dimensional experimental bifurcation diagram evidences a good match with respect to the numerical results available for both the approximated and original HR model. Moreover, the experimentally obtained current-frequency curve is very similar to that of the original model. The obtained results are both a proof of concept of a quite general method developed in the last few years for the approximation and implementation of nonlinear dynamical systems and a first step towards the realisation in silica of HR neuron networks with tunable parameters. (C) 2010 Elsevier B.V. All rights reserved
    corecore