1,721,034 research outputs found
A Coloured Nested Petri Nets Model for Discussing MANET Properties
Full text linkPredicting behavior and assuring quality of service of complex multimedia systems is very hard. Techniques based on tests, inspections or simulations are not always effective. Conversely, rigorous adoption of formal approaches in entire system lifecycle is very costly, and does not provide evidence about run-time performance. Our research proposes a tool, which allows both formally modeling and simulating a Mobile Ad-hoc NETwork - MANET. Previous paper of same authors discussed the tool effectiveness in simulating the system; the present paper deals with the Petri Nets-based model of MANET behavior, and shows the model usefulness in predicting some interesting computational properties
A Petri Net-based Tool For Modelling and Simulating Mobile Ad-Hoc Networks
No full textSeveral tools are available for simulating the behavior of
Mobile Ad-hoc NETworks (MANET). The main
disadvantages of most of them concern the difficulties in
managing the synchronization among the components
involved in the simulation. Secondly, these tools are just
simulators, in that they measure performance, but they do
not allow formal description of the system. The
augmented Petri Net-based tool DEMONE (moDElling
MObile NEtworks) is characterized by the capability to
formally model MANET and to simulate their execution,
and it proposes a new approach to synchronization based
on the specific behavior of the hosts in the MANET. In
order to validate DEMONE as a proper tool for
simulating MANET behavior, we analyzed the
performance of three different MANET: the results
obtained in 3000 simulations are analogous to the findings
reported in literature, but obtained with other simulators.
This experience is an evidence of the ability of DEMONE
in measuring performance of MANET
ARCHO: A computer based learning system for teaching computer architectures
No full textThe paper describes an educational system aimed at providing a course of computer architecture for graduate students. The system, called ARCHO, is composed by teacher oriented modules (to build lectures, exercises, computer architectures) and students oriented modules (to navigate the hypertext lectures, to resolve exercises and to compile programs on the computer processor simulator). ARCHO provides and integrates two different systems: ARCAL to support the study of theoretical concepts and to verify lectures and APE to support the laboratory activity by the building and using a computer architecture simulator
A rapid prototyping environment for designing and simulating multilevel computer architectures
No full textThis paper describes a software environment that allows the rapid development and simulation of computer architectures. The system, called the Architecture Prototyping Environment (APE), is based on an object-oriented approach for hardware component description. This approach allows the formation of a class definition that does not require the writing of special-purpose simulators. In this way, computer architecture hardware components are effectively and conveniently expressed as a class library, representing basic elements of the processor. APE allows the user to define the computer architecture at the instruction set level and then to switch automatically to the lower level of the corresponding microarchitecture. APE supports the design of a computer architecture (definition phase), which is used as a starting point for the next phase for evaluating prototype behavior (test phase). APE accepts modifications of the architecture design and repeats the simulation process until architectural features match user requirements
An Object Oriented Tool to Simulate Multi-Level Computer Architectures
No full textWe describe a simulator that is a useful supporting tool in all activities involving computer architecture teaching. The system, developed using an object-oriented approach, integrates in a single tool different architecture models, such as CISC and RISC architecture types, and different computer levels, such as microprogramming and instruction set levels. The system allows the user to define the computer architecture at the instruction set level and then to switch automatically to the lower level of the corresponding microarchitecture. The simulation process consists of a loop, in which two strictly correlated phases are executed: the definition phase, in which the user defines the architecture through a choice of hardware components, and a test phase, in which the user tests the designed architecture in order to verify the result of the design activity of the previous phase. Once the processor design has been completed through this simulation process, the tool allows the user to save and use a stand-alone simulator of the target computer architecture. The definition and simulation activities of the computer architecture are supported by a graphical user interface for an effective, easy-to-use teaching environment
A Rapid Prototyping Environment for Processor Design and Simulation to Teach Computer Architectures
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