1,721,148 research outputs found

    General Methodologies to Virtualize FPGAs in Hw/Sw Systems

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    The computational needs of an increasing number of applications often require dedicated circuits. Configurable devices, like the Field-Programmable Gate Arrays (FPGAs), are one of the most used solutions to implement such a hardware support. However the size of the circuits that can be mapped on the currently available FPGAs at a medium or low cost is limited with respect to the high demand of several applications in particular when embedded systems and single-chip systems are concerned. This paper introduces some operating-system techniques (namely, partitioning and overlaying) to virtually enlarge the size of the FPGA from the point of view of the applications. The solutions mimic the approaches widely used in the operating systems for virtual memory

    Pipelined median filters

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    Several DSP algorithms need to remove high-frequency or impulsive noise while preserving edges, e.g., in speech and image processing applications: median filtering has been proved more effective to achieve this goal than other filtering techniques. Efficient architectural implementation for real-time applications involves a careful VLSI design. which takes into account modularity. regularity, adaptability, throughput. circuit complexity, and fault tolerance. Two new architectural approaches are presented in this paper to deal with different application and implementation constraints: the pipelined polarizing median filter and the pipelined sorring median filter

    A modular fault-tolerant approach to design a digital front-end microsystem for calorimetry at LHC

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    The FERMI system has been designed to perform acquisition and DSP of calorimeter data in high energy collision experiments, planned at the LHC collider (CERN, Geneva, CH). The system relies mainly upon the FERMI chip, a dedicated VLSI multi-chip device: it requires rad-hard features due to the critical application, to the difficulties in maintenance, and to the operating environment. In this paper a modular approach to support policies for self diagnosis and fault tolerance, is discussed

    Column compression pipelined multipliers

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    The paper presents a study on the introduction of pipelining in parallel VLSI multipliers, built according to the column compression (CC) design techniques. A number of CC multiplier schemes have been proposed in the literature, aimed at reducing the number of stages of adders necessary to compute a multiplication. More recently CC multiplier schemes aimed at optimising the required silicon area, the regularity and the locality of the interconnections among the adders, have been proposed. The paper affords the introduction of pipelining in these last structures and compares the obtained results with existing structures, in terms of required number of components and operation frequenc

    Fast arithmetic and fault tolerance in the FERMI system

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    The FERMI is a data acquisition system for calorimetry experiments in high energy physics at the LHC, CERN. The system contains a large number of acquisition channels, with a precision of 16 bits and a sampling rate of 40 MHz. A large part of the information driven by the channels is processed locally, to reduce the amount of data. This requires to cluster several channels by adding them. The paper presents the design of a fast, low cost adder chip, based on the implementation of column compression techniques for the computation of integer addition. Since the system is operating in a radiation-hard environment, fault tolerance (namely fault detection) is implemented by means of arithmetic codes

    Fast pipelined multipliers for bit-serial complex numbers

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    A novel approach is presented for complex numbers in full fractional two's complement representation. A class of multipliers is discussed and evaluated: the authors consider in particular the computational time, the throughput, and the silicon area required by a VLSI implementation. High regularity and modularity are some of the most interesting features of the architecture
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