1,720,974 research outputs found
VLSI Design of a Digital RFI Cancellation Scheme for VDSL Transceivers
In this paper a digital RFI (Radio Frequency Interference) canceller for DMT (Discrete MultiTone modulation) based VDSL (Very high speed Digital Subscriber Line) systems is presented. The adopted algorithm is optimized in terms of performance vs. complexity and size of the involved memories. High level, maximum precision system simulations showed the effectiveness of the cancellation scheme, considering VDSL performance parameters such as bit rate and efficiency in counteracting performance degradation due to RFI. The canceller has been implemented as a hardware macro-cell: the design space already explored at algorithm level to meet a good complexity/performance trade-off, has been deeply investigated during the bit true analysis to fix the finite numeric representation, the micro-architecture definition and the final technology mapping. Results of logic synthesis on a standard cells 0.18 μm CMOS technology are reported, in terms of area and energy consumption
Router IP macrocell for radiation tolerant SpaceWire Networking
New scientific missions require the capability to handle large amount of data for earth observation, atmospheric sounding, planetary exploration. The European Space Agency recently proposed a serial data link standard, the SpaceWire (ECSS-E-50-12A), to facilitate the set up of onboard high-speed and reliable networks, to reduce system integration costs, to promote compatibility between equipment and to encourage the re-use of digital interfaces across different missions. To this aim this paper presents the VLSI design of configurable SpaceWire router and interface IP cores, the first in state-of-the-art compliant with the newest standard extensions Protocol IDentifier and Remote Memory Access Protocol. The IP cells have been integrated and tested on radiation-tolerant antifuse FPGA device by Actel, in the framework of an ESA space project. The achieved performances of 8 SpaceWire links routing, 100 Mbits/s data-rate, 1.2 W power consumption, 300 Krad radiation tolerance meet the requirements of planned ESA space missions. The proposed SpaceWire IPs simplify the on board connectivity, provide network redundancy and guarantee to handle very high bandwidth data flows
Design and Verification of Hardware Building Blocks for High-Speed and Fault-Tolerant In-Vehicle Networks
This paper presents the design, implementation, and validation of a FlexRay transceiver and a SpaceWire (SpW) router and interface, which constitute the main hardware building blocks of the two in-vehicle communication standards. The FlexRay protocol features data rates up to 10 Mb/s and time- and event-triggered transmissions, along with scalable fault-tolerance support, and it is expected to become the standard network for X-by-wire and active safety automotive systems. However, collision avoidance and driver-assistance applications based on camera/radar sensors require data rates up to hundreds of megabits per second as well as fault tolerance, features that can hardly be covered by current or expected automotive standards. In this scenario, a promising technology seems to be the new SpW protocol, currently used in avionics and aerospace
Single-chip Generic Sensor Interface Platforms for Space Applications
This paper discusses the new trends of sensor interfacing and acquisition for space applications. The design of a mixed-signal generic sensor interface architecture, integrated in a single chip, is proposed as a viable and suitable solution. The generic sensor interface architectural paradigm has been already assessed in the automotive scenario bringing advantages in terms of costs and flexibility with good results in terms of performance. Currently a research activity is started as a first step to extend this paradigm also to Space applications, both on-board satellite or ground spacecraft testing
Electronic Circuits and Systems for Sustainability and Safety Improvement of Road Transport
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