1,721,460 research outputs found
GaAs surface plasma treatments for Schottky contacts
No full textThe properties of different rectifying metallizations (Al, Ti/Pt, WNx on GaAs have been investigated for various surface preparation procedures. In particular, in situ hydrogen plasma treatments were used to remove residual surface contamination (mainly O and C) and a nitrogen plasma to grow a thin mixed nitride layer. Al and Ti/Pt Schottky diodes with an ideality factor very close to 1, but with reduced barrier height, were found after the H-2 plasma as a consequence of H diffusion into GaAs. The Schottky barrier height was further reduced if a H-2 + N2 plasma was performed. The N content in the sputtering environment during the WNx deposition affects the diode properties of plasma-treated WNx contacts. By increasing the N2 partial pressure, the diode barrier height is reduced, probably due to nitridization of the GaAs surface. Such differences disappear after annealing the diodes in arsine overpressure at 800-degrees-C. WNx contacts deposited under different conditions on H-2 plasma treated substrates also show a similar Schottky barrier height after such annealing
Degradation mechanism of Ti/Au and Ti/Pd/Au gate metallizations in GaAs MESFET's
No full textModifications of several dc parameters of GaAs MESFET’s
induced by accelerated aging at 300°C have been investigated
in a test pattern configuration. Two different gate metallization structures have been examined, namely GaAs/Ti/Au and
GaAs/Ti/Pd/Au. The gate diode and the MESFET characteristics of the former degrade noticeably upon annealing, while they are less affected by the thermal treatments for the latter. This different behavior is probably induced by the formation of different compounds at the metal-GaAs interface, which modify the gate diode properties
Ionising Radiation Effects on Ultra-Thin Gate oxide MOS
No full textINVITED PAPER
We have briefly reviewed the most important degradation mechanisms affecting ultra-thin gate oxides after exposure to ionizing irradiation. The increase of the gate leakage current seems the most crucial issue for device lifetime, especially for non-volatile memory and dynamic logic. The build-up of positive charge in the oxide and the subsequent threshold voltage shift, which was the major concern for thicker oxide, are no longer appreciable in today’s devices due to the reduced oxide thickness permitting a fast recombination of trapped holes with electrons from interfaces. Among the leakage currents affecting thin oxides we have considered here the Radiation Induced Leakage Current (RILC) and the Radiation Soft Breakdown (RSB). RILC is observed after irradiation with a low Linear Energy Transfer (LET) radiation source and comes from a trap-assisted tunneling of electrons mediated by the neutral traps produced by irradiation. RILC depends on the applied bias during irradiation and the maximum is measured when devices are biased in flat band. Contrarily to RILC, RSB is observed after irradiation with high LET ions and derives from the formation of several conductive paths across the oxide corresponding to the ion hits. RSB conduction is explained by the theory of the Quantum Point Contact as also proposed for the electrically induced Soft breakdown. Finally, we present some preliminary results, which indicate that although the direct effects of irradiation (in terms of gate leakage current increase) are small for oxide thinner than 3nm, it is possible that these devices may experience an accelerated wear-out and/or breakdown after subsequent electrical stress relative to a fresh (not irradiated) device
New Issues in Radiation Effects on Semiconductor Devices
No full textWe have briefly reviewed the most important degradation mechanisms affecting ultra-thin gate oxides after exposure to ionizing irradiation. The increase of the gate leakage current seems the most crucial issue for device lifetime, especially for non-volatile memory and dynamic logic. The build-up of positive charge in the oxide and the subsequent threshold voltage shift, which was the major concern for thicker oxide, are no longer appreciable in today’s devices due to the reduced oxide thickness permitting a fast recombination of trapped holes with electrons from interfaces. Among the leakage currents affecting thin oxides we have considered here the Radiation Induced Leakage Current (RILC) and the Radiation Soft Breakdown (RSB). RILC is observed after irradiation with a low Linear Energy Transfer (LET) radiation source and comes from a trap-assisted tunneling of electrons mediated by the neutral traps produced by irradiation. RILC depends on the applied bias during irradiation and the maximum is measured when devices are biased in flat band. Contrarily to RILC, RSB is observed after irradiation with high LET ions and derives from the formation of several conductive paths across the oxide corresponding to the ion hits. Finally, we present some preliminary results, which indicate that although the direct effects of irradiation (in terms of gate leakage current increase) are small for oxide thinner than 3nm, it is possible that these devices may experience an accelerated wear-out and/or breakdown after subsequent electrical stress relative to a fresh (not irradiated) device
Logic gate for integrated circuits (ICs), has first pair of switches activated alternately and connected to first node and output node by respective terminal, and second pair of switches to bring output node to potential of second node
No full textNOVELTY - The logic gate (100) has a Boolean network (105) having input node (106), output node (107), and terminal (108). The output node is connected to a first pair of switches (101,102) which are activated alternately, and which are respectively connected to the first node (109) and output node by a respective terminal. A second pair of switches (103,104) are provided between the first pair of switches, and connected to a second node (110). The second pair of switches are connected together to turn ON and OFF to bring the output node to the potential of the second node at fixed potential.
USE - Logic gate for ICs. Can be used in complementary metal oxide semiconductor (CMOS) ICs and digital circuits
IONIZING RADIATION EFFECTS ON ULTRA-THIN OXIDE MOS STRUCTURES
No full textWe have briefly reviewed the most important degradation mechanisms affecting ultra-thin gate oxides after exposure to ionizing irradiation. The increase of the gate leakage current seems the most crucial issue for device lifetime, especially for non-volatile memory and dynamic logic. The build-up of positive charge in the oxide and the subsequent threshold voltage shift, which was the major concern for thicker oxide, are no longer appreciable in today's devices due to the reduced oxide thickness permitting a fast recombination of trapped holes with electrons from interfaces. Among the leakage currents affecting thin oxides we have considered here the Radiation Induced Leakage Current (RILC) and the Radiation Soft Breakdown (RSB). RILC is observed after irradiation with a low Linear Energy Transfer (LET) radiation source and comes from a trap-assisted tunneling of electrons mediated by the neutral traps produced by irradiation. RILC depends on the applied bias during irradiation and the maximum is measured when devices are biased in flat band. Contrarily to RILC, RSB is observed after irradiation with high LET ions and derives from the formation of several conductive paths across the oxide corresponding to the ion hits. RSB conduction is explained by the theory of the Quantum Point Contact as also proposed for the electrically induced Soft breakdown. Finally, we present some preliminary results, which indicate that although the direct effects of irradiation (in terms of gate leakage current increase) are small for oxide thinner than 3nm, it is possible that these devices may experience an accelerated wear-out and/or breakdown after subsequent electrical stress relative to a fresh (not irradiated) device
Forming Gas Anneal effect on plasma-induced damage: beyond the appearances
No full textIndispensable for manufacturing of modern CMOS technologies, plasma processes result in charging of dielectric surfaces, thus damaging the gate oxide. A forming gas annealing (FGA) step is usually done at the end of the process to passivate and/or recover this damage. We investigated this problem on thin (3.5 nm) gate oxides by using a series of stress-anneal-stress steps on devices with different level of latent damage. Our results confirm that FGA actually reduces the number of traps responsible for stress-induced leakage current (SILC) or for microbreakdown in ultrathin gate oxides, but also put in evidence that defects induced by plasma treatments and those generated by way of electrical stress feature different anneal kinetics. Further, we have identified two categories of dielectric breakdown events, whose characteristics are strongly modified by the FGA step
Stress induced leakage current under pulsed voltage stress
No full textStress induced leakage current (SILC) is one of the main problems in ultra-thin oxide MOS devices before the onset of soft or hard breakdown. This paper addresses the problem of SILC produced by dynamic stress. We have studied the behaviour of ultra-thin oxides subjected to pulsed voltage stress (PVS) and the results have been compared with those obtained after constant voltage stress (CVS) and constant current stress (CCS). SILC has been studied as a function of PVS frequency: a decrease of low field leakage current has been found at high frequencies, pointing out to an enhanced life time of devices in integrated circuits operating at alternating voltage (as the majority of applications of silicon-based devices). The growth kinetics of SILC has been found to satisfy the same empirical model previously found for constant current stress. In the present work this model has been extended to PVS and the frequency dependence has been investigated. (C) 2002 Elsevier Science Ltd. All rights reserved
Logistic model for leakage current in electrical stressed ultra-thin oxides
No full textIt is shown that the leakage current flowing through an ultra-thin gate oxide in a metal-oxide-semiconductor structure subjected to a constant voltage stress can be described by a Verhulst-type logistic model. An exponential growth at the outset is followed by a saturation in the conduction characteristic, which indicates that, after a rapid expansion, the damaged area reaches an upper bound. This sigmoidal behaviour is interpreted as a self-constrained growth of the leakage site population
Ionizing Radiation Effects on Advanced CMOS Devices and on ESD Protection Structures for CMOS Technology
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