1,720,983 research outputs found
Identification and quantification of methane and ethyl alcohol in an environment at variable humidity by an hybrid array
No full textAn hybrid array, constituted by five chemically modified tin oxide thin films and a humidity sensor are the input of a feed-forward two layers perceptron net to identify and quantify individual concentrations of methane and ethyl alcohol mixtures in a variable humidity environment. The network always identifies which gas is present, no matter to humidity, and predicts the gas concentration with a percentage full scale error equal to 8%
Power Estimation of Embedded Systems: a Hardware/Software Co-design Approach
No full textThe need for low-power embedded systems has become very significant within the microelectronics scenario in the most recent years. A power-driven methodology is mandatory during embedded systems design to meet system-level requirements while fulfilling time-to-market. The aim of this paper is to introduce accurate and efficient power metrics included in a hardware/software (HW/SW) codesign environment to guide the system-level partitioning. Power evaluation metrics have been defined to widely explore the architectural design space at high abstraction level. This is one of the first approaches that considers globally HW and SW contributions to power in a system-level design flow for control dominated embedded systems
A conceptual analysis framework for low power design of embedded systems
No full textThe recent growing demand for portable computing and personal communication applications combined with the continuous increment of integration level and operating frequency of VLSI circuits, contributed to increase the importance of power dissipation issues in electronic systems. Most of the available low power design and estimation techniques provides optimization during the last phases of an integrated circuit design, i.e. gate, circuit and layout level. The issue of low power techniques and estimation is almost completely ignored above the gate level. An analysis methodology operating at Register Transfer Level (RTL) is a key factor to obtain early estimation results, while maintaining an acceptable level of accuracy in the results. The goal is to provide the designer the capability of analyzing different solutions in the architectural design space, before proceeding with the synthesis tasks. The aim of this paper is to provide an analysis framework targeting accurate and efficient estimation of power dissipation in embedded systems at RTL level. The proposed model combines the reduced complexity of the RTL description with the accuracy of the gate level descriptio
System-level power evaluation metrics
No full textHigh-level power estimation is a key issue for IC designers and system engineers. The goal is to widely explore the architectural design space and to compare alternative solutions, while maintaining an acceptable accuracy and a competitive design time. In this paper, an approach is proposed for evaluating the system-level power consumption of embedded systems implemented by using VLSI circuits. Accurate and efficient early power evaluation metrics have been defined to guide the system-level partitioning phase of a more general HW/SW co-design approach for control dominated embedded systems. The hardware and software contributions to the power consumption at the system-level have been considered as well as the contribution of the HW/SW communication
High-level power estimation of VLSI systems
No full textThe goal of this paper is to present an innovative conceptual framework suitable for achieving accurate and efficient estimation of power dissipation for data-path intensive architectures described at RT and Behavioral levels. The aim is to provide the designer with the capability of analyzing different solutions in the architectural design space, before the synthesis tasks. The proposed methodology addresses all the elements composing a typical data-path architecture, such as storage units, functional units and multiplexers. The paper includes experimental results demonstrating the validity of the proposed approach
A VHDL-based Approach for Power Estimation of Embedded Systems
Full text linkPower dissipation has become one of the main constraints during the design of embedded systems and VLSI circuits in the recent years, due to continuous increase of the integration level and the operating frequency. The aim of this paper is to present an innovative conceptual framework suitable for achieving accurate and efficient estimation of power dissipation for embedded systems described in VHDL at the behavioral and Register-Transfer levels. The goal is to provide the designer with the capability of analyzing and comparing different solutions in the architectural design space before the synthesis. The analytical power model is hierarchical, considering the different parts of the target system architecture, mainly the data-path, the memory, the control logic and the embedded core processor. Experimental results are obtained by applying the proposed power model to benchmark circuits
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