4,598 research outputs found

    Doherty, O J, 414863

    No full text
    This record was harvested from a previous catalogue system and will be withdrawn in 2025. Information in this record may be superseded or incomplete. Visit this record in UMA's new catalogue at: https://archives.library.unimelb.edu.au/nodes/view/382077Surname: DOHERTY. Given Name(s) or Initials: O J. Military Service Number or Last Known Location: 414863. Missing, Wounded and Prisoner of War Enquiry Card Index Number: 54109.212550 Item: [2016.0049.14370] "Doherty, O J, 414863

    Through the Lens of Color: An Interview with Gareth Doherty, Author of Paradoxes of Green: Landscapes of a City-State

    No full text
    This interview by Mark Tirpak with Gareth Doherty of Harvard University Graduate School of Design, focuses on his Paradoxes of Green: Landscapes of a City-State (University of California Press, 2017). With Paradoxes of Green (2017) and via the interview, Doherty recounts some of the findings of his ethnographic fieldwork in the Kingdom of Bahrain and describes tensions arising from differing conceptions of what ‘green’ means or signifies within this growing and predominantly arid region. An argument that Doherty makes in Paradoxes of Green (2017) is that color and form are interlinked, and that color deserves deeper consideration by policy-makers and other formal shapers of cities. The interview draws from Paradoxes of Green (2017) to discuss some of Doherty’s findings as well as his latest work on the intersections between landscape architecture and anthropology

    Helping children think: Gaze aversion and teaching

    No full text
    Looking away from an interlocutor's face during demanding cognitive activity can help adults answer challenging arithmetic and verbal-reasoning questions (Glenberg, Schroeder, & Robertson, 1998). However, such `gaze aversion' (GA) is poorly applied by 5-year-old school children (Doherty-Sneddon, Bruce, Bonner, Longbotham, & Doyle, 2002). In Experiment 1 we trained ten 5-year-old children to use GA while thinking about answers to questions. This trained group performed significantly better on challenging questions compared with 10 controls given no GA training. In Experiment 2 we found significant and monotonic age-related increments in spontaneous use of GA across three cohorts of ten 5-year-old school children (mean ages: 5;02, 5;06 and 5;08). Teaching and encouraging GA during challenging cognitive activity promises to be invaluable in promoting learning, particularly during early primary years

    Wideband Digital Intensive Doherty Concepts

    No full text
    Many applications require wide bandwidth transmitters, but unfortunately, they usually have way less than 50% average drain efficiency for their modulated signals. This low efficiency is a significant drawback in all wireless applications, both for battery power devices and base stations. The Doherty radio frequency (RF) power amplifier architecture is widely used to enhance the average efficiency for modulated signals in base stations. Its popularity is due to its relatively cheap and simple hardware and its suitability to handle high-power wideband modulated signals. However, even Doherty amplifiers often have less than 50% average efficiency and are restricted in their RF bandwidth.This thesis reviews recent research on the Doherty power amplifier (DPA) topology and discusses possible power and bandwidth efficiency improvements. In the second part of the thesis, another topology is introduced, which also provides Doherty-like behavior. That topology is called a Pseudo Doherty Load Modulated Balanced Amplifier (PD-LMBA). The performance of PD-LMBA is compared with “conventional” DPAs. Circuit design examples of DPA and PD-LMBA are given. The thesis concludes with a PD-LMBA prototype design, which appears to be very promising in its wideband performance.Electrical Engineering | Microelectronic

    A Wideband Two-Way Digital Doherty Transmitter in 40nm CMOS

    No full text
    A 40nm CMOS wideband digital Cartesian push-pull inverted Doherty operating in class-E is presented. Wideband Doherty operation is achieved over a 1.9-to-3GHz frequency band, using an off-chip power combining network. The fully digital transmitter (DTX) provides 25.3dBm peak power with a drain/DTX line-up efficiency (DE/SE) of 58.7%/44.9%, respectively, at 2.4GHz. When operated with a 160MHz 256-QAM OFDM signal, it achieves 46.1%/32.7% average DE/SE, with an ACLR and EVM better than −40.6dBc and −33.9dB, respectively, using a simple memory-less digital pre-distortion (DPD).Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Electronic

    A Highly Linear Wideband Polar Class-E CMOS Digital Doherty Power Amplifier

    No full text
    This article presents the first application of a digital-intensive intrinsically linear digitally controlled class-E technique in a Doherty configuration. By careful nonlinear segmentation and multiphase RF-clocking along with overdrive-voltage control and automatic duty-cycle correction, it is shown that even the nonlinearities related to Doherty operation can be fully handled by the underlying design such that digital predistorion (DPD) can be, in principle, omitted. The nonlinearity behavior of the whole digital Doherty power amplifier (PA) is analyzed, and closed-form equations are given to predict the AM-AM and AM-phase modulation (PM) curves. In addition, time/phase mismatch between the peak and main branches and the AM and PM signals is accurately compensated. In order to achieve the maximum intrinsic linearity, two separate chips with the same architecture, but different design parameters, are fabricated as the main and peak amplifiers in 40-nm bulk CMOS. To achieve a large RF bandwidth and high passive combiner efficiency, a differential low-loss, wideband Marchand balun-based Doherty power combiner, implemented using reentrant coupled lines with independent second-harmonic control is proposed, and together with the matching network is fabricated on a two-layer PCB. The measured peak/6-dB power backoff P OUT, drain efficiency/power-added efficiency at 2.4 GHz are 17.5 dBm/12.2 dBm, 57%/52% and 36%/25% with VDD main/peak = 0.6 V/0.7 V. Measured results without using DPD show -41-dBc adjacent channel power ratio (ACPR) and -36-dB error vector magnitude (EVM) for a 16-MHz OFDM signal at 2.5 GHz. By using DPD, the measured ACPR and EVM of a 16-MHz/32-MHz OFDM signals are -52 dBc/-48 dBc and -50 dB/-48 dB, respectively.Accepted author manuscriptElectronic

    Amplificador Doherty e antena combinadora

    No full text
    The conventional Doherty architecture is commonly used in wireless transmitters for its ability to boost the average efficiency of a traditional single-ended class B amplifier. It consists of two parallel single-ended amplifying branches (named carrier and peaking amplifiers) which are linked, at the output, through a /4 combiner. This output combiner commonly has a significant impact on the overall bandwidth, as it is usually built from a transmission line structure with tuned dimensions. Other non-conventional combining structures could be designed, targeting a wider bandwidth, contributing to an overall increase of the Doherty amplifier’s bandwidth. Being this an high relevance research topic for the development of high efficient and broadband amplifiers, it is highly desirable to have a laboratory setup that implements a Doherty power amplifier to which distinct output combiner structures can be connected and tested. In that sense, the design of two single-ended amplifiers (the carrier and the peaking) was performed in a circuit simulator (ADS, from Keysight) together with the input power divider that compose the Doherty architecture. The Doherty amplifier main board was designed to incorporate the carrier and peaking amplifiers, and also the power splitter at the input, and it was prepared so that it could be connected to any desired combiner to be tested. A traditional Doherty power combiner was designed and both boards (Doherty amplifier and the combiner) were produced, connected and tested in the RF laboratory. The measured amplifier presented the typical caractheristics of a Doherty amplifier with nearly 75% of drain efficiency at full-power, and nearly 50% at the output back-off level. In addition, a second combiner unit was designed with two purposes. The first was to demonstrate the operation of the designed Doherty amplifier with a distinct output combiner, showing that, as intended in this work, it is suited to test multiple combiner structures. The second objective was to serve as preliminary test to evaluate the possibility of merging the output combiner with the antenna element. Taking advantage of the electromagnetic coupling between antennas, this second combiner structure uses two antenna elements that were tuned to simultaneously behave as output combiner of the Doherty amplifier and a radiating element.A arquitetura Doherty convencional é tipicamente utilizada em transmissores sem fios pela sua capacidade de aumentar a eficiência média de um tradicional amplificador em classe B. O amplificador Doherty consiste em dois amplificadores em paralelo (chamados de amplificadores carrier e peaking) que são ligados, na saída, através de um combinador de /4. Este combinador de saída geralmente tem um impacto significativo na largura de banda do amplificador, pois é tipicamente construído a partir de uma estrutura de linhas de transmissão com dimensões ajustadas para uma frequência. Outras estruturas de combinadores não convencionais podem ser projetadas, visando uma largura de banda maior, contribuindo para um aumento geral da largura de banda do amplificador Doherty. Sendo este um tópico de investigação de elevada relevância para o desenvolvimento de amplificadores de alta eficiência e largura de banda, seria interessante ter um setup de laboratório que implemente um amplificador de potência Doherty para o qual estruturas combinadoras distintas possam ser ligadas à saída do amplificador e testadas. Nesse sentido, o projeto de dois amplificadores (carrier e peaking) foi realizado num simulador de circuitos (ADS, da Keysight) junto com o divisor de potência de entrada que compõe a arquitetura Doherty. A placa principal do amplificador Doherty foi projetada para incorporar os amplificadores carrier e peaking, e também o divisor de potência na entrada, e foi preparada de modo que pudesse ser ligada a qualquer combinador desejado a ser testado. Um combinador de potência Doherty tradicional foi projetado e ambas as placas (amplificador Doherty e o combinador) foram produzidas, soldadas e testadas no laboratório de RF. O amplificador medido apresentou as características típicas de um amplificador Doherty com aproximadamente 75% de eficiência de dreno na potência máxima e aproximadamente 50% no ponto de output back-off. Além disso, foi projetado um segundo combinador com dois objetivos. O primeiro foi demonstrar o funcionamento do amplificador Doherty projetado com um combinador de saída distinto, mostrando que, como pretendido neste trabalho, o amplificador desenhado é adequado para testar múltiplas estruturas combinadoras. O segundo objetivo foi servir como teste preliminar para avaliar a possibilidade de fundir o combinador de saída com a antena. Aproveitando o acoplamento eletromagnético entre antenas, esta segunda estrutura combinadora utiliza duas antenas que foram projetadas para se comportarem simultaneamente como combinador de saída do amplificador Doherty e como elemento radiante.Mestrado em Engenharia Eletrónica e Telecomunicaçõe

    A Millimeter-Wave CMOS Series-Doherty Power Amplifier With Post-Silicon Inter-Stage Passive Validation

    No full text
    This article presents a wideband series-Doherty power amplifier (SDPA) for millimeter-wave (mm-wave) fifth-generation (5G) applications. It features a compact two-step impedance inverting-based series-Doherty power combiner that provides broadband close-to-perfect power back-off (PBO) efficiency enhancement. The amplitude-to-amplitude (AM-AM)/amplitude-to-phase (AM-PM) performance of the load-modulated Doherty power amplifier for broadband operation is analyzed. We also devise a post-silicon inter-stage passive validation (PSIV) approach to evaluate the mm-wave chip prototype utilizing the embedded voltage root mean square detectors. The proposed SDPA is realized in a 40-nm bulk CMOS, and it delivers 20.4 dBm PSAT with 39.1%/34% PAE at 0-/6-dB PBO. Over a 23.5-30 GHz band, its PAE is >24% at 6-dB PBO. At 27 GHz, applying a '2 GHz 16-quadratic-amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM)' signal, the proposed SDPA generates 10.2 dBm average power with 18.9% average PAE. The average error vector magnitude is better than -24.5 dB without digital predistortion for a '400-MHz 64-QAM OFDM' signal while generating an average output power of 8.8 dBm with 15% PAE. The AM-AM/AM-PM of the realized SDPA is investigated by employing a '50-MHz 64-QAM OFDM' signal, validating our analysis and showing that the linearity limitation of DPAs is systematic and predictable. Utilizing the proposed PSIV approach, the frequency response of the input/inter-stage passive circuits is measured, indicating an excellent agreement with 3-D electromagnetic (EM) simulation results.Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Electronic

    A 39 W Fully Digital Wideband Inverted Doherty Transmitter

    No full text
    A high-power fully-digital Doherty transmitter (DDTX) is proposed. It features two segmented LDMOS output switch banks implemented in a custom V T -down-shifted LDMOS technology. A 40 nm CMOS controller digitally activates the individual LDMOS gate segments of the output stage at RF speed. An inverted Doherty power combiner is proposed that features non-short circuited 2 nd harmonic conditions for the main and peak switch banks to boost the RF bandwidth. To guarantee smooth output power and efficiency vs. frequency, a 2 nd harmonic trap is introduced in the power combiner, yielding an RF bandwidth of > 400 MHz. The realized demonstrator can achieve over 39 W peak output power. Its highest drain and system efficiencies, respectively 60 % and 57 %, were found at 34.2 W of output power, while in power back-off its peak drain and system efficiencies are 52 % and 48 % respectively. Over a 25 dB output range, the system efficiency is within 4 percent points of the drain efficiency.Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Electronic
    corecore