11 research outputs found

    PHYSICAL MODELING OF ELECTRICAL AND DIELECTRIC PROPERTIES OF HIGH-k Ta2O5 BASED MOS CAPACITORS ON SILICON

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    In this paper we present an integral physical model for describing electrical and dielectric properties of MOS structures containing dielectric stack composed of a high-k dielectric (with emphasize on pure and doped Ta2O5) and an interfacial silicon dioxide or silicon oxynitride layer. Based on the model, an equivalent circuit of the structure is proposed. Validity of the model was demonstrated for structures containing different metal gates (Al, Au, Pt, W, TiN, Mo) and different Ta2O5 based high-k dielectrics, grown of bare or nitrided silicon substrates.The model describes very well the I-V characteristics of the considered structures, as well as frequency dependence of the capacitance in accumulation. Stress-induced leakage currents are also effectively analyzed by the use of the model

    Peculiarities of the interface between high-permittivity dielectrics and semiconductors

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    Replacement of the silicon dioxide thin films in metal-oxide-semiconductor structures for microelectronics with high permittivity dielectrics (high-k) is a crucial step in the further down-scaling of microelectronic devices. Technological development of the fabrication processes and better theoretical understanding of the physical phenomena in the considered structures are demanded simultaneously. Important issues concerning high-k are discussed in these paper and directions for further development indicated. Further progress requires better understanding of the physical phenomena appearing in stacked high-k/interfacial layer dielectrics

    Frequency Dependence of C-V Characteristics of MOS Capacitors Containing Nanosized High-κ Ta2O5 Dielectrics

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    Capacitance of metal–insulator–Si structures containing high permittivity dielectric exhibits complicated behaviour when voltage and frequency dependencies are studied. From our study on metal (Al, Au, W)–Ta2O5/SiO2–Si structures, we identify serial C-R measurement mode to be more convenient for use than the parallel one usually used in characterization of similar structures. Strong frequency dependence that is not due to real variations in the dielectric permittivity of the layers is observed. Very high capacitance at low frequencies is due to the leakage in Ta2O5 layer. We found that the above observation is mainly due to different leakage current mechanisms in the two different layers composing the stack. The effect is highly dependent on the applied voltage, since the leakage currents are strongly nonlinear functions of the electric field in the layers. Additionally, at low frequencies, transition currents influence the measured value of the capacitance. From the capacitance measurements several parameters are extracted, such as capacitance in accumulation, effective dielectric constant, and oxide charges. Extracting parameters of the studied structures by standard methods in the case of high-κ/interfacial layer stacks can lead to substantial errors. Some cases demonstrating these deficiencies of the methods are presented and solutions for obtaining better results are proposed

    New geomagnetic measurements in the Republic of Macedonia

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    This study presents measurements of the geomagnetic field of the Republic of Macedonia, performed through a network of newly defined repeat stations. The measurements of these elements were in the intervals of 3.378° ≤ DD ≤ 3.983°, 57.276° ≤ I ≤ 59.005°, and 46 235 nT ≤ F ≤ 46903 nT. The geomagnetic data were processed and the results of the observed elements of the geomagnetic field on the repeat stations are presented. Additional data processing was performed to calculate the reduced values of the intensive elements of the field at the level of H500 a.s.l.. Based on these data, new maps of the geomagnetic field of the Republic of Macedonia are developed, together with the polynomial model of the elements of the geomagnetic field for the 2010.0 epoch

    HYSTERESIS-LIKE FLATBAND VOLTAGE INSTABILITIES IN Al/Ta2O5-SiO2/Si STRUCTURES AND THEIR CONNECTION WITH J-V CHARACTERISTICS

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    Flatband and current-voltage instabilities in unstressed Al/Ta2O5-SiO2/Si structures were studied in details. It has been found that, after an initial run left on fresh samples, both C-V and J-V characteristics exhibit repeatable patterns. Precisely repeatable counterclockwise hysteresis-like loop in C-V characteristics occurs, while no significant hysteretic behaviour is observed in static J-V characteristics. The reduced instability in J-V characteristics is explained by mutual compensation of two opposite effects owing to the presence of trapped positive charges on slow traps in the interfacial SiO2-like layer: (i) flatband voltage shift and (ii) lowering of Fowler-Nordheim tunnelling barrier for holes injected from the Si substrate. Correct determination of equivalent oxide thickness and fast interface state densities requires using the C-V curves obtained during the runs right, because progressive trapping on slow states occurs during the runs left. Value of the oxide charge is to be determined using the value of the flatband voltage obtained from the run left (after an initial run right), since it corresponds to the state of empty slow traps.</jats:p

    Analysis of Conduction and Charging Mechanisms in Atomic Layer Deposited Multilayered HfO2/Al2O3 Stacks for Use in Charge Trapping Flash Memories

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    Method for characterization of electrical and trapping properties of multilayered high permittivity stacks for use in charge trapping flash memories is proposed. Application of the method to the case of multilayered HfO2/Al2O3 stacks is presented. By applying our previously developed comprehensive model for MOS structures containing high-κ dielectrics on the J-V characteristics measured in the voltage range without marked degradation and charge trapping (from −3 V to +3 V), several parameters of the structure connected to the interfacial layer and the conduction mechanisms have been extracted. We found that the above analysis gives precise information on the main characteristics and the quality of the injection layer. C-V characteristics of stressed (with write and erase pulses) structures recorded in a limited range of voltages between −1 V and +1 V (where neither significant charge trapping nor visible degradation of the structures is expected to occur) were used in order to provide measures of the effect of stresses with no influence of the measurement process. Both trapped charge and the distribution of interface states have been determined using modified Terman method for fresh structures and for structures stressed with write and erase cycles. The proposed method allows determination of charge trapping and interface state with high resolution, promising a precise characterization of multilayered high permittivity stacks for use in charge trapping flash memories

    Structure of the geomagnetic field in correlation with neotectonic regionalization of the Republic of Macedonia

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    The paper presents research of the structure of the geomagnetic field in correlation with the neotectonic regionalization. The territory of the Republic of Macedonia, according to the neotectonic processes, is divided in three zones: Western - Macedonian zone which include Alpine orogeny and Pelagonian massif, Vardar zone and Eastern - Macedonian zone which is part of the old Paleozioc rock mass on the Balkan Peninsula. Anomalous geomagnetic field on the territory of the Republic of Macedonia is presented with regional and local components. Selection of the repeat stations density and the method for data processing is adapted to separate the regional from the local component of the anomalous geomagnetic field. The paper presents maps of the elements of the regional anomalous geomagnetic field and the map of the Z - component for the local field

    PROGRESS IN MATERIALS FOR MICROELECTRONICS AND FURTHER CHALLENGES

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    Development of materials and technologies for microelectronics is required by the needs of the constantly in-creasing level of integration of microelectronics circuits. Increase of the integration level compels downscaling of all the dimensions of devices, which in its turn requires very thin layers with exceptional quality due to rather high elec-tric fields at working conditions. First, technological improvements are adopted aimed at fabrication of materials with uniform quality, geometrical flatness and extremely low density of intentionally introduced defects. Second, new fab-rication methods are developed providing materials with much better quality. Third, new materials showing better properties than the standard (conventional) ones are obtained and developed further.Decreasing the dimensions of the layers changes the nature of the physical phenomena involved in the func-tioning of devices. Quantum mechanical mechanisms are more and more important in the description of the properties of the materials and devices on the nanoscale. The question arises where is the limit of the possibilities of the materi-als and technologies for nanoscale electronics.</jats:p
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