1,721,245 research outputs found
넓은 입력 전압 범위에서 작은 트랜스포머 오프셋 전류를 가지는 비대칭 하프-브리지 컨버터
No full text이 논문에서는, 홀드-업 보상 기법을 통해 넓은 입력 범위에서 최적 설계가 가능한 비대칭 하프-브리지 컨버터를 제안한다. 제안된 회로가 갖는 주된 장점은 기존의 회로 동작에 어떠한 변화도 주지 않은 채, 넓은 입력 전압 범위에서도 최적 설계가 가능하게 하는 것이다. 기존의 비대칭 하프-브리지 컨버터는 입력 전압이 가장 낮은 홀드-업 시 설계가 되어, 정상 동작 시 비대칭 동작에 의한 단점을 갖는 반면, 제안 된 컨버터는 홀드-업 시 추가적인 전압 이득을 통해 출력 전압을 제어하기 때문에 홀드-업 동작 시 넓은 입력 전압 범위에 관계없이 컨버터의 최적 설계가 가능하다. 또한 기존의 방법들에 비해, 정상 동작 시에 추가 소자에 의한 손실이 발생하지 않아, 전 범위에서 고효율을 달성하였다. 250-410V 입력, 45V/3.3A 출력의 컨버터를 통해 제안 된 회로의 동작을 검증하였다
Analysis and Design of Phase-Shifted Dual H-Bridge Converter With a Wide ZVS Range and Reduced Output Filter
No full textIn this paper, a phase-shifted dual H-bridge converter, which can solve the drawbacks of existing phase-shifted full-bridge converters such as narrow zero-voltage-switching (ZVS) range, large circulating current, large duty-cycle loss, and serious secondary-voltage overshoot and oscillation, is analyzed and evaluated. The proposed topology is composed of two symmetric half-bridge inverters that are placed in parallel on the primary side and are driven in a phase-shifting manner to regulate the output voltage. At the rectifier stage, a center-tap-type rectifier with two additional low-current-rated diodes is employed. This structure allows the proposed converter to have the advantages of a wide ZVS range, no problems related to duty-cycle loss, no circulating current, and the reduction of secondary-voltage oscillation and overshoot. Moreover, the output filter's size becomes smaller compared to the conventional phase-shift full-bridge converters. This paper describes the operation principle of the proposed converter and the analysis and design consideration in depth. A 1-kW 320-385-V input 50-V output laboratory prototype operating at a 100-kHz switching frequency is designed, built, and tested to verify the effectiveness of the presented converter
High-Efficiency Phase-Shifted Full-Bridge Converter With a New Coupled Inductor Rectifier (CIR)
No full textA conventional phase-shifted full-bridge (PSFB) converter is one of the most promising topologies in high-efficiency and high-power applications because of its small RMS current, inherent zero-voltage switching capability, and clamped voltage stress of the primary switches. However, when the PSFB converter operates with a small duty ratio, a large freewheeling current of an output inductor flows in the primary side, and it causes a large circulating current. In addition, it has a large voltage stress in the rectifier diodes due to a voltage ringing between parasitic components. To solve these problems, a new PSFB converter with a coupled inductor rectifier (CIR) is proposed in this paper. By adopting the CIR structure in the PSFB converter instead of the full-bridge rectifier, the proposed converter eliminates the freewheeling current in the primary side, which significantly reduces the primary circulating current. In addition, the two rectifier diodes of the CIR do not have voltage ringing. As a result, the proposed converter not only reduces the conduction loss in the primary side, but can also use two diodes in the rectifier with a low voltage rating. The effectiveness and feasibility were verified with a 320-400 V input and 56-V/12.8-A output prototype.
A High-Efficiency Three-Phase ZVS PWM Converter Utilizing a Positive Double-Star Active Rectifier Stage for Server Power Supply
No full textDisturbance of the climate due to greenhouse gases is the most unsafe and complicated of all the ecological problems. The main cause is the emission of carbon dioxide from fossil fuels, which produces around 80% of the world's energy. Consequently, energy strategies are mandatory in reducing the total carbon dioxide emanations. At the data centers, one key element that is suitable for energy management is the server's power supply unit (PSU). The conventional PSU architecture (disregards the power factor correction stage) is based on the conventional low-voltage high-current dc-dc converter which accomplishes the international standards in a range around 1.5 kW. Beyond that power rating, the imposed losses become significantly high. To cope up with the constant increase in information technology demands, this paper proposes a three-phase zero voltage switching dc-dc converter associated with a positive double-star active rectifier and a reduced current unbalance transformer for high-power-density-efficiency energy conversion. The operating stages, topology analysis, and experimental results for a 1.2-kW prototype with 97% efficiency at half power load are presented
Novel energy recovery circuit using an address voltage source
No full textCost effective and high efficiency energy recovery circuit (ERC) using an address voltage source is proposed. Different from prior ERC, the proposed circuit uses a voltage source to charge a panel and a current source to discharge the panel. As a result, it can be achieved zero voltage switching (ZVS) of switches in H-bridge inverter and zero current switching (ZCS) of switches of the ERC. Moreover, the proposed ERC can obtain high efficiency, high performance and the decrease of the cost and the size
LLC Resonant Converter with Hold-up Time Extension Technique for Computer Power Supply
No full textA LLC resonant converter with hold-up time extension technique for computer power supply is proposed. Since the proposed circuit has a current boost-up capability of resonant inductor regardless of the input voltage level and the load power condition, operating near the resonant frequency, it can provide the power to the load as the input voltage drops to half of reflected output voltage to the transformer primary. This extends the holdup time of computer power supply and improves the system power density and conversion efficiency at nominal input voltage. The experimental results with prototype are given to confirm the validity of the proposed circuit
Derivation, Analysis, and Comparison of Nonisolated Single-Switch High Step-up Converters With Low Voltage Stress
No full textThis paper presents nonisolated single-switch high step-up converters with low voltage stress. Based on the conventional flyback converter, one single-switch high step-up converter is derived. The voltage stresses on the switch and diodes are limited by using a clamping diode and voltage doubler structure. Also, to further reduce the voltage stresses of them, another single-switch high step-up converter is proposed simply by using one additional capacitor and rearranging the components. Thus, lower voltage-rated switch and diodes can be used, which results in higher efficiency. The operational principle, analysis and design considerations of each converter are presented in this paper. The validity of this study is confirmed by the experimental results from 24 V input and 250 V/125 W output prototype
공통형 잡음 분석을 기반으로한 고전력밀도에 적합한 브리지리스 역률보상회로 토폴로지에 관한 연구
No full text본 논문에서는 공통형 잡음 분석을 통해 고전력밀도에 적합한 브리지리스 역률보상회로에 대해 연구한다. 이를 통해, 브리지리스 역률보상회로의 EMI 특성 악화에 가장 큰 문제가 되는 공통형 잡음을 개선을 하기 위한 방법을 분석하고, 전력밀도를 저하시키지 않으면서 EMI 특성을 개선할 수 있는 브리지리스 역률보상회로 토폴로지에 대해 연구한다. 또한, 이를 바탕으로 얻어진 회로와 동일한 전력밀도 및 EMI 특성을 가지면서 실제 산업에 적용할 수 있는 브리지리스 역률보상회로를 제안한다
Phase-Shifted Full-Bridge DC-DC Converter With High Efficiency and High Power Density Using Center-Tapped Clamp Circuit for Battery Charging in Electric Vehicles
No full textIn this paper, a phase-shifted full-bridge (PSFB) converter employing a new center-tapped clamp circuit is proposed to achieve high efficiency and high power density in electric-vehicle battery charger applications. By using a simple center-tapped clamp circuit, which consists of two diodes and one capacitor, many limitations in conventional PSFB converters are solved. The proposed center-tapped clamp circuit provides the clamping path and allows the secondary voltage stress to be clamped to the secondary-reflected input voltage. This results in a greatly reduced conduction loss in the secondary full-bridge rectifier (FBR) due to the low-forward-voltage drop of low-voltage-rated diodes, and the resistor-capacitor-diode snubber loss is eliminated. In addition, the circulating current in the primary side is removed without any duty-cycle loss. Furthermore, the turn-OFF switching loss in the FBR is substantially reduced due to the decreased reverse-recovery current and the reduced reverse voltage. With these advantages, high efficiency can be achieved. Besides, the size of the output inductor is considerably reduced with the aid of clamping voltage, resulting in a high power density with saving the cost. In order to confirm the effectiveness of the proposed converter, a 33-kW prototype was tested. Experimental results show that the proposed converter achieves high efficiency over the entire conditions with high power density.
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