1,720,987 research outputs found
Calibration of time-interleaved ADCs via Hermitianity-preserving Taylor approximations
No full textA new calibration technique for time-interleaved analog-to-digital converters is proposed, based on Hermitianity-preserving complex Taylor approximations of the frequency response of the correction filters. Calibration is interpreted as approximating these filters with linear combinations of base filters obtained by the proposed Taylor expansion. Known calibration techniques are reinterpreted in this way and compared in terms of accuracy, computational complexity, numerical stability, and convergence time. The new technique is shown to be accurate and to require few hardware resources. The limited number of parameters to estimate enables good performance in fixed-point arithmetic and fast convergence. This is important in background calibration schemes in which parameters need to be estimated in real time
Faster, stabler, and simpler - A recursive-least-squares algorithm exploiting the Frisch-Waugh-Lovell theorem
No full textWe propose a novel recursive least squares (RLS) algorithm that exploits the Frisch-Waugh-Lovell theorem to reduce digital complexity and improve convergence speed and algorithmic stability in fixed-point arithmetic. We tested the new algorithm in the digital background calibration section of a four-channel time-interleaved analog-to-digital converter, obtaining better stability and faster convergence. The digital complexity of the new algorithm in terms of multiplications and divisions is 33% lower asymptotically than that of the conventional Bierman algorithm if the model parameters need not be computed at each update; otherwise, it is the same. Memory requirements are also the same. Because, in calibration, the distance between the ideal and calibrated outputs of the system is to be minimized, the actual value of the model parameters is usually not of interest. Convergence time can be up to 10 or 20 times better in fixed-point arithmetic, and stability for large models is also better in our simulations. In our simulations, when the conventional Bierman RLS algorithm is stable, the steady-state accuracy of the new algorithm is either comparable or better, depending on the simulation setup
New models for the calibration of four-channel time-interleaved ADCs using filter banks
No full textNew linear models to calibrate four-channel time-interleaved analog-to-digital converters are proposed and investigated. The ideal four-periodic correction filters, which cancel distortions, are computed as a function of the error filters that model the analog transfer function of each channel, including the sampling time. These correction filters are then approximated as a linear combination of base filters and new accurate models with a limited number of free parameters are proposed. Calibration is performed using the recursive least squares algorithm to estimate the coefficients of the linear combination (and the offset term). The resulting algorithms are tested for accuracy, convergence speed, and stability in a fixed-point implementation, and are compared with previously published linear background calibration techniques. The proposed filter bank significantly improves the accuracy/complexity tradeoff with respect to previously published techniques
Parallel and hierarchical architectures of 4-channel MFP digitizer
No full textTwo alternative architectures of 4-channel mixing-filtering-processing (MFP) digitizers are presented. Both architectures use four analogue-to-digital converters (ADCs), but differ in terms of layout, and are named parallel and hierarchical. Unlike conventional time-interleaved digitizers, which require ADCs characterized by relaxed sampling rate but critical bandwidth specifications, the proposed architectures are less demanding in terms of both ADCs' sampling rate and bandwidth, thus allowing less noise into the digitizer. Two digital signal processing techniques, needed to combine the digitized streams produced by the ADCs and obtain a digital representation of the input signal, are described for both parallel and hierarchical architectures. These techniques are developed on the basis of suitable error models, also discussed in the paper, and allow removing gain and aliasing errors due to analogue impairments by means of streamline calibration. The results of behavioural simulations carried out to assess the performance of the two alternative 4-channel MFP architectures are finally shown
General approach to the calibration of innovative MFP multi-channel digitizers
No full textInnovative digitizers exploiting mixing, filtering and processing (MFP) operations can grant ultra-high bandwidth and sampling rate. Their operation combines analog processing stages with a digital signal processing stage, where massive operations are performed to obtain the digital representation of the input signal. In fact, the samples returned by the analog-to-digital converter (ADC) consist of a transformed, namely mixed and filtered, version of the input, which shall be processed in the digital domain to reconstruct the input signal. The digital processing is also designed to attain streamline calibration, which provides both the removal of non-ideal effects, such as mismatches between individual channels, and the improvement of the frequency response flatness. Calibration strategies represent an asset of manufacturers’ know-how, since the performance of the digitizer largely depends on the effectiveness of the calibration process. Gain equalization and aliasing removal are performed in the digital domain by finite impulse response (FIR) filtering of the ADCs’ outputs. A general method for the identification of the calibration filters, and their translation into algorithms for MFP digitizers using 2, 4, or any number of channels, is here proposed. Functional-level and circuit-level Cadence Virtuoso simulations in an STMicroelectronics Si-Ge heterojunction bipolar transistor (HBT) process are also carried out to evaluate the performance of the proposed method through a comparison between the digital representations of the signals obtained with and without calibration
Machine learning techniques for frequency sharing in a cognitive radar
No full textA Cognitive Radar, working in a frequency dense environment, has to perform effective wideband operations, spanning several frequency channels, by working in parallel with other radar and/or communication systems. The cognitive operation is possible by modeling the channel behavior and predicting future channel occupancy. The model of the electromagnetic environment is based on the observation of the spectrum occupancy during a number of time slots and on suitable machine learning to acquire the characteristics of the channel occupancy. The learning operation is paramount, as the prediction about channel occupancy is possible only after understanding the behavior of the concurrent emitters present in the scenario. This paper describes the concept of machine learning techniques, based on emitter pattern classification and matching. implemented on a number of real cases of emitter behavior. In particular, we are defining these techniques by considering four real cases of emitter behavior, namely fixed, sequential, periodical and random channel acquisition. We show that, in the above examined cases, our machine learning techniques can provide good emitter matching, even in presence of a consistent number of concurrent transmitters
High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain
No full textThis paper presents a novel ultra-low-power ultra-low-voltage operational transconductance amplifier (OTA). The OTA operates with a 0.3V supply voltage and shows remarkable bandwidth performance with very limited power consumption, owing to the use of current mirrors with gain. Low impedance internal nodes of the current mirrors allow to boost gain and bandwidth, adding only high-frequency poles to the frequency response. Therefore, the compensation of the proposed OTA can be achieved through a dominant pole at the output, as in conventional cascode amplifiers. The circuit employs two identical input stages with cross-coupled inputs to improve common-mode rejection ratio (CMRR) performance, and a differential-to-single-ended output stage. The resulting architecture achieves a remarkable FOMS value, as demonstrated by the simulations performed in a commercial 130nm CMOS technology
Low-power class-AB 4th-order low-pass filter based on current conveyors with dynamic mismatch compensation of biasing errors
No full textA 4th-order Butterworth class-AB current-mode low-pass filter is proposed, based on second-generation Current Conveyors (CCII). Class-AB operation allows high-power efficiency and driving large loads with small quiescent currents. The CCII topology uses the class-AB output buffer with error amplifiers: this topology is known to be sensitive to mismatch errors, which cause offsets in the error amplifiers, affecting the biasing current of the stage. This problem is solved via a control loop, which compensates the effect of mismatches. The technique is shown to be effective in Monte Carlo simulations with process variations and mismatches. Simulations have been carried out in 40 nm CMOS technology. The proposed filter achieves good power efficiency, thanks to the class-AB architecture, and good dynamic range, thanks to the closed-loop output buffer. A cut-off frequency of 6 MHz, with 184 μW of total quiescent power consumption, is achieved, with a THD of -55 dB and a SNR of 49 dB
A 2-channel digitizer based on MFP strategy
No full textA 2-channel digitizer based on a mixing-filtering-processing (MFP) strategy capable of granting ultra-high bandwidth and sampling rate is presented. The digitizer requires suitable digital signal processing resources, which consist of several dedicated integrated circuits (ICs), to produce a digital representation of the input signal. Processing is also in charge of streamline calibration, that involves eliminating the artefacts due to mismatches between individual channels and equalizing the frequency response of the system. The design issues related to the implementation of calibration and signal reconstruction are presented. Tests needed to assess the system configuration at the manufacturing stage are also discussed
Design of broadband high dynamic-range fiber optic links
No full textAn analytic design-oriented model of microwave optical links has been developed. The core of the model is the non-linear and noise model of a Mach-Zehnder LiNbO3 interferometer. Both a 100 MHz-20FOR VERIFICATION GHz link and a linearized microwave link, comprising an auxiliary modulator, have been designed and prototyped by using the model
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