1,720,993 research outputs found
Generation of current mode filter structures using dual output transconductance amplifiers
No full textA general procedure for generating filter structures based on dual output OTAs is presented. A structural approach is employed to determine the capability of dual output OTAs to realise transfer functions of various filter responses. This paper discusses the generation of useful second-order filter configurations including LP, HP, BP, and BR responses
Systematic generation of current mode dual output OTA filters using a building block approach
No full textA synthesis method is described for generating current mode dual-output OTA filter configurations. The procedure is based on a building-block approach and provides a systematic and structural method for generating filter circuits. Using this method, the capabilities of dual-output OTA devices in active filter design can be fully investigated. While the procedure is general, it is shown how filter circuits (LP, HP, BP, and BR) based on one, two and three dual-output OTAs are generated
High performance distributed arithmetic FPGA decimators for video frequency applications
No full textThis paper describes a method for implementing high performance integer decimators for video-frequency applications using FPGAs. The decimators are derived from polyphase decomposition of an FIR filter prototype and implemented using a modified distributed arithmetic look-up table architecture previously only suitable for low-order specifications. A new pseudo floating point method of coefficient representation is described, allowing high-order filters to be achieved with the limited resources of FPGAs. Furthermore, a RAM based delay operator is used to provide an efficient decimator sample delay section in place of the flip-flop realisation normally employed. To demonstrate the design methodology, the implementation of a 2:1 decimator for 27MHz oversampled video signals using a Xilinx XC4013E FPGA is included
Analysis and compensation of OTA non-ideal effects in video frequency CMOS sinc(x) equaliers
No full textThis paper presents a detailed analysis and minimisation of OTA non-ideal effects in sinc(x) amplitude equaliser operating at video frequencies. The compensation has been achieved by deriving a set of design equations incorporating the OTA input capacitance and output resistance and the polynomial coefficients used to correct the sinc(x) distortion. Simulated and measured results are included showing the effectiveness of the compensation technique
Comparative study of recursive digital filters using Z and delta operators
No full textThis paper presents a comparative study of recursive digital filters based on z and delta operators. The effects of different parameters on the performance of filters are studied including coefficient quantisation, filter order, oversampling ratio and filter approximation. The capabilities and limitations of the delta operator in comparison with z are illustrated through simulation examples. This study produces some general guidelines which can be useful in selecting an appropriate operator for a particular filter specification
Constrained genetic algorithm design of finite precision FIR linear phase raised cosine filters
No full textThis paper investigates the use of genetic algorithm in the design of finite linear phase raised cosine FIR filters. The design of such filters does not only involve meeting a specific amplitude response but also imposes time domain constraints on the impulse response in order to ensure zero ISI. It is shown that genetic algorithm provides simple and effective technique for the design of finite precision filters with both frequency and time domain constraints. Furthermore, the algorithm computational time is low with respect to filter order and is independent of word length. Two filter design examples are included demonstrating the effectiveness of the design method
CMOS equaliser for compensating sinc(x) distortion of video D/A converters
No full textThe authors describe the design and CMOS realisation of a new gm-C amplitude equaliser for correcting sinc(x) distortion in video D/A converters. Simulated and measured results demonstrate how the equaliser is used to correct distortion in D/A converters with Fs=13.5MHz to <0.08dB ripple over 5MHz bandwidth. Fabricated using 0.8µm CMOS process, the equaliser occupies 0.7mm2 and dissipates 20mW from a 5V supply
A computer program for the design and analysis of linear phase FIR raised cosine filters
No full textA computer program for the design and analysis of linear phase FIR raised cosine filters is described. It allows the design of traditional and equiripple FIR filters with roll-off factors between 0 and 1. In addition the program is capable of computing coefficients for the recently introduced raised cosine filters with factor >1. The design algorithms are solved using linear programming. A number of filter examples are included
Efficient design of switched current lowpass elliptic filters using Bruton transformations
No full textThis paper describes how the Bruton transformation facilitates the development of an efficient design methodology for switched current elliptic lowpass wave filters. Wave models for the design methodology including FDNR, capacitive source and load are presented. The proposed design method offers a significant reduction in the filter transistor count. For example, a 7th-order lowpass elliptic filter utilises 20% less delay elements and 16% less current mirrors when compared with a recently reported design method. This is achieved by having a filter with a large number of resistors and simplified series adapters. Simulated results based on a typical CMOS process for a lowpass elliptic filter with Fc=100KHz and Fs=1MHz are included
Compensation of non-ideal effects in video frequency sinc(x) equalisers using tunable gm_c structure
No full textThe authors introduce a new biquadratic tunable-Gm_C amplitude equaliser structure for correcting sinc(x) distortion of video D/A converters. Unlike previously reported equalisers, the structure realises independent electronic control of W0 and Q by means of gm tuning, allowing simple compensation for active device non-ideal effects. A design example is given demonstrating the tunability and superior equaliser performance when compared with other structures. Simulation and measured results are included
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