33 research outputs found
CMOS driving circuit operating down to 77 K for single-photon emitting diode
A fully-integrated CMOS driving circuit for single-photon emitting diodes in silicon, optimized for space applications, is presented. The electronics comprises two 10-bit DACs in order to precisely set the on and off voltages of the diode based on the measured temperature by an integrated temperature sensor. A large driving voltage range of 0-5 V guarantees the maximum flexibility in the working temperature range from 77 K to 300 K. The chip also contains a pulse generator, capable of driving the diode with short pulses down to 20 ns triggered by an external signal, which is essential in a single-photon light source. The integrated circuit is realized in standard 150-nm CMOS technology, with a chip area of 1.2 mm2 and a power consumption less than 6mW
Fully Integrated Cryo-CMOS Spin-to-Digital Readout for Semiconductor Qubits
A fully integrated CMOS readout operating at cryogenic temperature for semiconductor spin qubits is fabricated and characterized. The readout is based on a direct spin-to-digital conversion, consisting of integrating the spin-dependent current from a sensing single-electron transistor and an accurate comparator to provide a 1-bit digital output related to the qubit state. The cryogenic comparator uses floating-gate transistors to obtain a low power, compact, and self-calibrated threshold. The readout can resolve a variation of the sensing current of 250 pA with a submicrosecond time resolution and a fidelity of 99.86% for a total power consumption of 1.2 mW and an occupation area of less than 0.04 mm2. Compared to the most common RF-reflectometry readout techniques, our solution does not require off-chip components and the handling of microwave signals, paving the way for a more compact and reliable readout syste
Disentangling the emergence and evolution dynamics of the blockchain technology
Blockchain is an emerging evolutionary paradigm expected to revolutionize existing business models in many
industries and to impact the world economy and society. Its potential pervasiveness is increasingly drawing
the interest of academics, practitioners, firms, financial institutions as well as national governments, who define
it as a general purpose technology (GPT). Although it may take considerable time to affirm a technology as
general, in this phase of evolution of the blockchain domain, to what extent can it be considered a GPT? This
paper aims to disentangle technology dynamics by unveiling and mapping blockchain technology structure,
evolution, and future trends. We propose a framework that distinguishes three different structures: (1) the core
structure that encompasses the most relevant technological elements of the domain; (2) the supportive
structure that supports the core structure and improves the overall efficiency of the infrastructure including the
different aspects; and (3) the complementarity structure that brings tailor-made solutions enabling the GPT
field. We use a network-based perspective and examine blockchain international patents issued from 2008 to
2018. Our study contributes to the technology innovation literature by uncovering the emergence and
evolutionary dynamics of a GPT, and our results provide an empirical basis on which managers can build
technology-related decisions and systems to enable appropriate firms’ innovation strategies
Second-harmonic generation in plasmonic waveguides with nonlocal response and electron spill-out
Plasmonic waveguides provide an integrated platform to develop efficient
nanoscale ultrafast photonic devices. Theoretical models that describe
nonlinear optical phenomena in plasmonic waveguides, usually, only incorporate
bulk nonlinearities, while nonlinearities that arise from metallic constituents
remained unexplored. In this work, we present a method that enables a
generalized treatment of the nonlinearities present in plasmonic waveguides and
use it to calculate second-harmonic generation from free electrons through a
hydrodynamic nonlocal description. As a general application of our method we
also consider nonlinearities arising from the quantum hydrodynamic theory with
electron spill-out. Our results may find applicability in design and analysis
of integrated photonic platforms for nonlinear optics incorporating wide
variety of nonlinear materials such as heavily doped semiconductors for
mid-infrared applications
What's in a Name? An exploration of the emerging organizations conceptual structure
This study describes the conceptual structure of emerging organisations on the basis of research over the past 26 years. During this period, terms and theoretical perspectives have proliferated, creating a feld that is highly fragmented and dispersed. Using a co-word analysis based on author keywords, we selected the most frequent key-terms to provide a complete overview of current studies. In particular, through cluster analysis, we highlight the labels that entrepreneurship scholars have used to investigate emerging organisations and illustrate how they are arranged in subgroups. Furthermore, we interpret the distances among terms with multidimensional scaling. Using overlay visualization, we anchor the relevance of the keywords over time. Our fndings show that fve possible conceptualizations of emerging organisations coexist. These range from antecedents of venture creation to innovation mechanisms. We conclude that entrepreneurial nascency is just one of several descriptive components used in academic studies
Added value of SPECT/CT over planar imaging in improving sentinel node detection in breast cancer patients. Il valore aggiunto della SPECT/CT rispetto all’imaging planare nel migliorare la ricerca del linfonodo sentinella in pazienti con carcinoma mammario
The aim of the study was to assess the diagnostic contribution of hybrid SPECT/CT lymphoscintigraphy compared to planar imaging for the correct identification of sentinel lymph nodes (SLN) in breast cancer (BC) patients.Obiettivo dello studio è stato valutare il contributo diagnostico della linfoscintigrafia ibrida SPECT/CT rispetto alla tecnica planare per la corretta identificazione del linfonodo sentinella (LS) in pazienti con carcinoma mammario (CM). Materiali e metodi. 73 linfoscintigrafie planari e SPECT/CT sono state eseguite in 70 pazienti consecutivi con CM (70 donne, età media 55,7±12,0 anni, range 26-84) per la ricerca pre-chirurgica del LS. Il coefficiente K di Cohen è stato utilizzato per valutare la concordanza tra le due tecniche linfoscintigrafiche; la capacità diagnostica è stata valutata mediante il test t-Student per dati appaiati. Risultati. In 54/73 (73,9%) linfoscintigrafie, i LLSS sono stati rilevati sia nelle immagini planari sia nella SPECT/CT. Nei 19/73 (26,1%) casi di discordanza, la tecnica planare ha mostrato un maggior numero di LLSS in 4/19 linfoscintigrafie, mentre la SPECT/CT in 15/19. La chirurgia radioguidata ha confermato i risultati della SPECT/CT. La concordanza tra le due tecniche è risultata bassa (K=-0,095). Complessivamente la SPECT/CT ha rilevato 13 LLSS in più rispetto all’imaging planare (p=0,07). Inoltre, in 17/73 (23,2%) linfoscintigrafie, la SPECT/CT ha definito l’esatta localizzazione anatomica dei LLSS, risultata equivoca alle immagini planari. Conclusioni. La SPECT/CT dimostra un valore aggiunto rispetto alle immagini planari, fornendo ulteriori informazioni per la corretta pianificazione dell’intervento chirurgico. La SPECT/CT è utile specialmente in pazienti con l’imaging planare negativo, inconcludente o dubbio
Lung function impairment in pediatric patients with sickle cell anemia from Nigeria is associated with low steady state hemoglobin
Spatially modulated illumination allows for light sheet fluorescence microscopy with an incoherent source and compressive sensing
Light sheet fluorescence microscopy has become one of the most widely used techniques for three-dimensional imaging due to its high speed and low phototoxicity. Further improvements in 3D microscopy require limiting the light exposure of the sample and increasing the volumetric acquisition rate. We hereby present an imaging technique that allows volumetric reconstruction of the fluorescent sample using spatial modulation on a selective illumination volume. We demonstrate that this can be implemented using an incoherent LED source, avoiding shadowing artifacts, typical of light sheet microscopy. Furthermore, we show that spatial modulation allows the use of Compressive Sensing, reducing the number of modulation patterns to be acquired. We present results on zebrafish embryos which prove that selective spatial modulation can be used to reconstruct relatively large volumes without any mechanical movement. The technique yields an accurate reconstruction of the sample anatomy even at significant compression ratios, achieving higher volumetric acquisition rate and reducing photodamage biological samples. (C) 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreemen
Cryogenic CMOS readout with programmable threshold for quantum computing
LAUREA MAGISTRALEOggigiorno i computer hanno raggiunto prestazioni incredibili grazie a potenze di calcolo estremamente grandi. Eppure, ci sono alcune classi di problemi che non sono in grado di gestire e risolvere (per esempio fattorizzazione di grandi numeri interi, simulazione di sistemi quantistici), perlomeno in tempi ragionevoli. I computer quantistici promettono, invece, di risolverli in pochissimo tempo, usando come bit (qubit) lo stato di sovrapposizione delle particelle quantistiche insieme al loro entanglement, per processare in parallelo una quantità di informazione ben più enorme. Per sfruttare queste peculiarità quantistiche, i qubit devono essere raffreddati a temperatura criogenica (<5K). Oggi, i qubit sono controllati da una convenzionale elettronica posta a temperatura ambiente, mediante lunghi cavi. Questo approccio, con l’aumento del numero di qubit, non sarà più possibile. Un nuovo approccio è la realizzazione di un sistema di controllo integrato in silicio operante a 4.2K posto vicino i qubit, limitando così il numero di connessioni tra i componenti criogenici e la strumentazione a temperatura ambiente. Inoltre, La riduzione della lunghezza dei cavi insieme alle basse temperature permettono di incrementare le prestazioni dell’elettronica in termini di larghezza di banda e di rumore, consentendo la gestione di un grande numero di qubit insieme ad un minor degrado delle loro prestazioni. In questo lavoro di tesi ci siamo concentrati sull’elettronica criogenica di lettura dello stato dei qubit basati su punti quantistici in silicio a due livelli di spin. Lo stato del qubit in questione dipende dallo spin dell’elettrone intrappolato e può essere letto da una misura di variazione di corrente o impedenza del punto quantistico. Noi proponiamo un'architettura che si basa sull'integrazione della corrente del punto quantistico attraverso un amplificatore a basso rumore in configurazione integratore e un comparatore, per generare un segnale digitale. Il piccolo segnale all'uscita dell'integratore (pochi mV) combinato alla grande variabilità a 4.2K della tensione di offset e dei parametri dei qubit, richiede una fine calibrazione della soglia del comparatore. Per affrontare questa sfida, abbiamo progettato un comparatore con la calibrazione automatica della soglia, utilizzando dei transistor a floating gate come memoria analogica.
Al fine di progettare il sistema criogenico di lettura della corrente, abbiamo innanzitutto caratterizzato a 4.2K le diverse architetture di amplificatori progettati in passato nel laboratorio I3N del Politecnico di Milano, usando una tecnologia CMOS a 350-nm. Al fianco di risultati positivi sono stati riscontrati alcuni difetti che nella progettazione di un integratore criogenico ad alta risoluzione sarebbero deleteri. Questo discostamento tra i valori attesi e le misure è da imputare ad un modello criogenico dei transistor non accurato. Quindi abbiamo proceduto alla caratterizzazione sistematica di una tecnologia CMOS più performante (150-nm CMOS di LFoundry) al fine di ottenerne un modello simulativo (BSIM3v3) più accurato a 4.2K. Il modello estratto e coerente con le misure effettuate è stato utilizzato successivamente per la progettazione del comparatore criogenico a soglia programmabile. Il comparatore è in grado di auto-programmare l’offset voluto, utilizzando dei transistor a floating gate (FG) sia come elementi funzionali del comparatore sia come memoria programmabile. Le simulazioni effettuate mostrano la sua efficacia nell’eliminare l’offset. Infine, per ottenere un modello simulativo a temperatura criogenica di un transistor a FG realizzato in tecnologia CMOS standard, è stata condotta una caratterizzazione di un transistor a FG realizzato per un precedente lavoro di tesi.Today computers have achieved incredible performances thanks to an extremely large computing power. However, they are not able to solve and manage some class of problems (e.g. integer factorization, simulation of quantum systems, etc. ), at least in a reasonable time. Instead, quantum computers promise to solve them in no time, using the superposition state of quantum particles together with their entanglement as bits (qubits), to process in parallel much more data. To exploit these quantum phenomena, qubits must be cooled to cryogenic temperature (<5K). Today, qubits are controlled by conventional room temperature electronics by means of long cables. With an increase in the number of qubits, this approach will no longer be possible. A radically new approach is to realize a silicon integrated control system operating at 4.2K near the qubits, thus limiting the number of cables connecting the cryogenic components to the room temperature instrumentation. Moreover, short cables with low temperature allow to increase the performances of the electronics in terms of bandwidth and noise, allowing the control of a large number of qubits, without degrade their performances. In this thesis work, we focused on the cryogenic readout electronics to asses the state of qubits based on silicon quantum dots with two spin levels. The quantum dot state depends on the trapped electron spin and can be read by a measurement of the variation of the quantum dot current or impedance. We propose an architecture based on the integration of the quantum dot current by means of a low noise gated integrator and a comparator to produce a digital output. The small signals at the gated integrator output (few mV) combined to the large variability at cryogenic temperature of the offset voltages and of the qubits parameters, request a fine tuning of the comparator threshold. To address this challenge, we have designed a comparator with an automatic calibration of the threshold using a floating gate as analog memory.
In order to properly design the cryogenic readout system, we first characterized at 4.2K different amplifier architectures, designed in the past at Lab. I3N of Politecnico di Milano using 350-nm CMOS technology. Beside good results, some shortcomings, which would be detrimental for the project of an high resolution cryogenic integrator, have been measured. This deviation between expected and measured values is due to an inaccurate cryogenic transistor model. Therefore, we proceeded to the systematic characterization of a more promising technology (150-nm CMOS by LFoundry) in order to obtain a more accurate simulative model (BSIM3v3) at 4.2K. The extracted models are consistent with measurements and they were used for the design of the cryogenic programmable threshold comparator. The comparator is able to self-program the desired offset, using floating gate transistors (FG) both as functional elements in the comparator architecture and as programmable memory. The simulations carried out show its effectiveness in offset cancellation. Finally, in order to obtain a simulative model of the cryogenic FG transistor, realized in standard CMOS technology, a characterization of a FG transistor was carried out
